component
UCC2813DTR-5
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC2813DTR-5
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC2813DTR-5 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output and PWM comparator input; feedback compensation network connected between COMP and FB pins; can source up to 2.5mA or sink up to 0.5mA with internal current limiting for zero duty cycle. |
| 2 | FB | input | Inverting input of error amplifier; minimize lead length and stray capacitance for stability; provides feedback signal with high open-loop voltage gain of 60-80dB and 2MHz gain-bandwidth product. |
| 3 | CS | input | Input to current sense and overcurrent comparators with 100ns leading edge blanking; accepts 0.9-1.1V peak signal at 1.65V/V typical gain; -200 to +200nA input bias current. |
| 4 | RC | input | Oscillator timing programming pin; external RC network between REF and RC sets switching frequency up to 1MHz and maximum duty cycle; recommended timing resistance 10kΩ to 200kΩ and capacitance 100pF to 1000pF. |
| 5 | GND | power_in | Reference ground and power ground for all device functions; provides return path for signal and high current gate driver circuits; separate return paths recommended to minimize signal noise. |
| 6 | OUT | output | High current MOSFET gate driver output capable of ±750mA to ±1A peak current with 41-70ns rise time and 44-75ns fall time; actively held low when VCC below UVLO threshold; internal Zener clamps to VCC, no external protection diode required. |
| 7 | VCC | power_in | Bias power supply input through external current-limiting resistor from low-impedance source; internal Zener regulator limits voltage to 12-15V absolute maximum with 13.5V typical clamp; requires 0.1µF to 1µF ceramic bypass capacitor to GND. |
| 8 | REF | power_out | Precision voltage reference output 4V ±1.5% at 25°C for UCC2813-5 model; provides bias and threshold setting for error amplifier and internal comparators; can supply up to 5mA output current; pulled low through 5kΩ internal resistor during UVLO; requires 0.1µF minimum ceramic bypass capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC2813DTR-5 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc2813dtr-5-etched.step/ucc2813dtr-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2813dtr-5.step/ucc2813dtr-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
e691a7fcf4f2163a, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).