main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 21h ago
viewers ucc28086dr: viewers · Ray 21h ago
package.json Publish 0.1.0 · Ray 21h ago
page.json Set visibility: public · Ray 21h ago
README.md Initial commit: component/ucc28086dr · Ray 21h ago
ucc28086dr-etched.glb ucc28086dr: factory component page (tier=mfr) · Ray 21h ago
ucc28086dr-etched.step ucc28086dr: factory component page (tier=mfr) · Ray 21h ago
ucc28086dr-hero.glb ucc28086dr: hero GLB from the etched model (keeps the MPN mark) · Ray 45m ago
ucc28086dr-hero.overlay.json Publish 0.1.0 · Ray 21h ago
ucc28086dr.glb Publish 0.1.0 · Ray 21h ago
ucc28086dr.kicad_mod Publish 0.1.0 · Ray 21h ago
ucc28086dr.kicad_sym Publish 0.1.0 · Ray 21h ago
ucc28086dr.lbr Publish 0.1.0 · Ray 21h ago
ucc28086dr.step Publish 0.1.0 · Ray 21h ago

UCC28086DR

Texas Instruments · DC-DC Converters · SOIC-8

UCC28086DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CTRL input Error voltage input to the PWM comparator, typically driven from a secondary-side error amplifier through an opto-coupler, with an internal divider ratio of 0.45 to keep a usable range at the minimum VDD of 4.1 V.
2 ISET input Current selection for slope compensation: a resistor RSET from ISET to ground sets the ramp, with the ISET pin voltage tracking the 1.5 V internal oscillator ramp and ISLOPE = 5 × ISET.
3 CS input Current-sense input to the PWM comparator, cycle-by-cycle peak current comparator and overcurrent comparator; exceeding the overcurrent threshold (0.70 V to 0.80 V) causes a soft-start cycle, and the absolute maximum is VDD + 0.3 V and not more than 6 V.
4 RT input Oscillator programming pin: an external resistor from RT to GND sets the oscillator frequency, with nominal RT voltage of 1.5 V (1.2 V to 1.6 V) and a recommended timing resistor range of 25 kΩ to 698 kΩ.
5 GND power_in Reference ground and power ground for all functions; due to high currents and high-frequency operation, a low-impedance circuit board ground plane is highly recommended.
6 OUTB output High-current push-pull output stage, alternating with OUTA, capable of 500 mA peak source and 1 A peak sink to drive a power MOSFET gate.
7 OUTA output High-current push-pull output stage, alternating with OUTB, capable of 500 mA peak source and 1 A peak sink to drive a power MOSFET gate.
8 VDD power_in Power input connection with absolute maximum supply voltage of 15 V (IDD < 10 mA); a 1-µF ceramic decoupling capacitor to GND placed close to the chip is recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: UCC28086DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ucc28086dr-etched.step / ucc28086dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc28086dr.step / ucc28086dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 19bab60962d5c6f5, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF