# UCC28084PWR

**Texas Instruments** · DC-DC Controllers · TSSOP-8

UCC28084PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Alternating high-current output stage capable of 500-mA peak source and 1-A peak sink current, switching at half the oscillator frequency. |
| 2 | VDD | power_in | Power input connection, absolute maximum 15 V (IDD < 10 mA), to be bypassed to GND with a 1-µF ceramic capacitor close to the chip. |
| 3 | CTRL | input | Error voltage input to the PWM comparator, with an internal divider ratio of 0.45, typically driven from a secondary-side error amplifier through an opto-coupler. |
| 4 | ISET | input | Current selection for slope compensation, programmed by a resistor RSET to ground (ISLOPE = 5 x ISET, RSET minimum >5 kΩ). |
| 5 | CS | input | Current-sense input to the PWM comparator, cycle-by-cycle peak current comparator and overcurrent comparator (0.75 V typ threshold, triggers a soft-start cycle), with an internal MOSFET discharging the filter capacitor. |
| 6 | RT | input | Oscillator programming pin where an external resistor to ground (25 kΩ to 698 kΩ recommended) sets the frequency, with nominal pin voltage of 1.5 V. |
| 7 | GND | power_in | Reference ground and power ground for all functions, requiring a low-impedance circuit board ground plane. |
| 8 | OUTB | output | Alternating high-current output stage capable of 500-mA peak source and 1-A peak sink current, switching at half the oscillator frequency. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Start-up current (VDD < UVLO start threshold voltage) |  |  | 120 | 200 | µA | VDD < UVLO start threshold voltage | 3 |
| Supply current | IDD |  | 1.5 | 2.5 | mA | CTRL = 0 V, CS = 0 V, See Note 1 | 3 |
| Start threshold voltage (UCC38084/6) |  | 4.1 | 4.3 | 4.5 | V |  | 3 |
| Minimum operating voltage after start (UCC38084/6) |  | 3.9 | 4.1 | 4.3 | V |  | 3 |
| Hysteresis voltage (UCC38084/6) |  | 0.1 | 0.2 | 0.3 | V |  | 3 |
| Frequency (2 x f(OUTA)) |  | 180 | 200 | 220 | kHz |  | 3 |
| Voltage amplitude (at ISET pin) |  | 1.4 | 1.5 | 1.6 | V | See Note 2 | 3 |
| Oscillator fall time (dead time) |  |  | 110 | 220 | ns |  | 3 |
| RT pin voltage |  | 1.2 | 1.5 | 1.6 | V |  | 3 |
| Gain |  | 1.9 | 2.2 | 2.5 | V/V | See Note 3 | 4 |
| Maximum input signal voltage |  | 0.47 | 0.52 | 0.57 | V | CTRL = 5 V, See Note 4 | 4 |
| CS to output delay time |  |  | 100 | 200 | ns | CTRL = 3.5 V, 0 mV ≤ CS ≤ 600 mV | 4 |
| Source current (CS pin) |  |  |  | -200 | nA |  | 4 |
| Sink current (CS pin) |  | 3 | 7 | 12 | mA | CS = 0.5 V, RT = 2.0 V, See Note 5 | 4 |
| Overcurrent threshold voltage |  | 0.7 | 0.75 | 0.8 | V |  | 4 |
| CTRL to CS offset voltage (25°C) |  | 0.55 | 0.7 | 0.9 | V | CS = 0 V, 25°C | 4 |
| CTRL to CS offset voltage |  | 0.37 | 0.7 | 1.1 | V | CS = 0 V | 4 |
| Maximum duty cycle |  | 48 | 49 | 50 | % | Measured at OUTA or OUTB, See Note 7 | 4 |
| Minimum duty cycle |  | 0 |  |  | % | CTRL = 0 V | 4 |
| Low-level output voltage (OUTA or OUTB) |  |  | 0.5 | 1 | V | IOUT = 100 mA | 4 |
| High-level output voltage (OUTA or OUTB), VDD − VOUT |  |  | 0.5 | 1 | V | IOUT = −50 mA, (VDD − VOUT), See Note 6 | 4 |
| Rise time |  |  | 25 | 60 | ns | CLOAD = 1 nF | 4 |
| Fall time |  |  | 25 | 60 | ns | CLOAD = 1 nF | 4 |
| OUTA/OUTB soft-start interval time (UCC38083/4) |  | 1.3 | 3.5 | 8.5 | ms | CTRL = 1.8 V, CS = 0 V, Duty cycle from 0 to full, See Note 8 | 4 |
| IRAMP, peak slope compensation current | IRAMP | 125 | 150 | 175 | µA | ISET, peak = 30 µA, Full duty cycle | 4 |
| Supply voltage VDD | VDD |  |  | 15 | V | IDD < 10 mA | 3 |
| Supply current IDD | IDD |  |  | 20 | mA |  | 3 |
| Sink current (peak) OUTA |  |  |  | 1 | A |  | 3 |
| Sink current (peak) OUTB |  |  |  | 1 | A |  | 3 |
| Source current (peak) OUTA |  | -0.5 |  |  | A |  | 3 |
| Source current (peak) OUTB |  | -0.5 |  |  | A |  | 3 |
| Analog input CTRL (upper limit VDD +0.3 V) | CTRL | -0.3 |  |  | V |  | 3 |
| Analog input CS (upper limit VDD +0.3 V, not to exceed 6 V) | CS | -0.3 |  | 6 | V |  | 3 |
| RSET (minimum) | RSET | 5 |  |  | kΩ |  | 3 |
| RT pin voltage (absolute limits) | RT | -0.3 |  | 2 | V | −100 µA < IRT < 100 µA | 3 |
| Power dissipation (PW package) |  |  |  | 400 | mW | TA = 25°C | 3 |
| Junction operating temperature | TJ | -55 |  | 150 | °C |  | 3 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 3 |
| Lead temperature |  |  |  | 300 | °C | soldering 10 seconds | 3 |
| Operating free-air temperature range (UCC28084 option) | TA | -40 |  | 85 | °C |  | 2 |
| Thermal resistance junction-to-case, TSSOP-8 (PW) | θjc |  | 32 |  | °C/W | Modeled data, See Note 2 | 2 |
| Thermal resistance junction-to-ambient, TSSOP-8 (PW) | θja | 232 |  | 257 | °C/W | Modeled data; lower value for 3x3 inch, higher for 1x1 inch ground plane, See Note 2 | 2 |

## CAD (KiCad official)

- Symbol: `UCC28084PWR`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ucc28084pwr-etched.step` / `ucc28084pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc28084pwr.step` / `ucc28084pwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ucc28084.pdf) (28 pp, sha256 `19bab60962d5c6f5`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc28084pwr-datasheet.pdf)