component
UCC2807D-2
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 19d ago |
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| README.md | 19d ago |
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| ucc2807d-2-etched.step | 19d ago |
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| ucc2807d-2-hero.overlay.json | 19d ago |
| ucc2807d-2.glb | 19d ago |
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| ucc2807d-2.lbr | 19d ago |
| ucc2807d-2.step | 19d ago |
UCC2807D-2
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC2807D-2 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TRIG | input | Oscillator timing input with an RC-type charge/discharge signal controlling the internal oscillator; minimum CT is 47pF and minimum RA is 10kΩ. |
| 2 | COMP | output | Output of the error amplifier and input of the PWM comparator; it can source and sink current, and forcing it to GND gives zero duty cycle. |
| 3 | FB | input | Inverting input to the error amplifier (2.0V reference); keep connections short and stray capacitance small for best stability. |
| 4 | CS | input | Current sense input to the PWM and overcurrent comparators (1.5V typical overcurrent threshold), with 100ns leading edge blanking after the OUT rising edge; absolute maximum -0.3V to VDD+0.3V. |
| 5 | GND | power_in | Reference ground and power ground for all functions of the part. |
| 6 | OUT | output | Totem-pole high current gate driver output with peak currents exceeding 1A (±1A absolute maximum), actively held low when VDD is below the UVLO threshold. |
| 7 | VDD | power_in | Power input connection; absolute maximum supply voltage is 13.5V (IDD ≤10mA), UCC2807-2 start threshold is 12.5V typical, and it should be bypassed to GND with a ceramic capacitor close to the chip. |
| 8 | DISCH | passive | Low impedance discharge path for the external RC timing network during normal operation, with minimum RB of 2.2kΩ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC2807D-2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc2807d-2-etched.step/ucc2807d-2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2807d-2.step/ucc2807d-2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
18e438c9fefd4905, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).