component
UCC2806PWTR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC2806PWTR
Texas Instruments · AC-DC Controllers And Regulators · TSSOP-16
UCC2806PWTR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CURLIM | input | Programs the primary current limit threshold and sets latching versus retry behavior after an overcurrent; a 200-µA source pulls it down on shutdown, and a voltage below 350 mV allows restart. |
| 2 | VREF | power_out | 5.1 V ±1% trimmed reference output with a 5 mA maximum available current, which must be bypassed to GND with at least a 0.1-µF ceramic capacitor. |
| 3 | CS-- | input | Inverting input of the 3× differential current sense amplifier. |
| 4 | CS+ | input | Non-inverting input of the 3× differential current sense amplifier. |
| 5 | NI | input | Non-inverting input of the error amplifier. |
| 6 | INV | input | Inverting input of the error amplifier. |
| 7 | COMP | output | Output of the error amplifier and input of the PWM comparator, a low-impedance 2-MHz amplifier that is internally current limited, so zero duty cycle is commanded by forcing COMP to GND. |
| 8 | CT | input | Oscillator timing capacitor connection, discharged to GND through a 2.5-mA sink, which sets switching frequency and the dead time that forces AOUT and BOUT low. |
| 9 | RT | input | Oscillator timing resistor connection, nominally at 1.25 V, where the current mirror is limited to 100 µA so RT must be greater than 12.5 kΩ. |
| 10 | SYNC | bidirectional | Bidirectional TTL-compatible synchronization pin that outputs a pulse during oscillator dead time, or acts as an input and disables the internal oscillator when RT is forced above 4.4 V. |
| 11 | AOUT | output | High-current gate drive output for an external MOSFET that alternates with BOUT, with duty cycle variable from 0% to 50%. |
| 12 | GND | power_in | Reference ground and power ground for all functions of the device, to which bypass and timing capacitors should be connected as close as possible. |
| 13 | VC | power_in | Input supply connection for the FET drive outputs, with an input range of 2.5 V to 15 V that should be capacitively bypassed. |
| 14 | BOUT | output | High-current gate drive output for an external MOSFET that alternates with AOUT, with duty cycle variable from 0% to 50%. |
| 15 | VIN | power_in | Input supply connection for the device, internally limited by a 15 V shunt regulator with shunt supply current limited to 25 mA and bypassed to GND with at least 0.01 µF ceramic. |
| 16 | SHUTDOWN | input | Enhanced-protection shutdown input that forces AOUT and BOUT low when driven above 1 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
UCC2806PWTR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ucc2806pwtr-etched.step/ucc2806pwtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2806pwtr.step/ucc2806pwtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
20f40789e136b23c, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).