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UCC2806DW

Texas Instruments · AC-DC Controllers And Regulators · SOIC-16-300mil

UCC2806DW from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CURLIM input Programs the primary current limit threshold; voltage above 350 mV latches device and requires power cycle restart, below 350 mV allows automatic retry after overcurrent condition.
2 VREF power_out Trimmed 5.1 V ±1% reference output with maximum 5 mA available current; must be bypassed to GND with 0.1 μF minimum ceramic capacitor.
3 CS-- input Inverting input of 3× differential current sense amplifier for pulse-by-pulse current limiting.
4 CS+ input Non-inverting input of 3× differential current sense amplifier for pulse-by-pulse current limiting.
5 NI input Non-inverting input of the error amplifier for voltage feedback control.
6 INV input Inverting input of the error amplifier for voltage feedback control.
7 COMP output 2 MHz error amplifier output and PWM comparator input with low output impedance; internally current limited to allow sinking or sourcing current and forcing COMP to GND commands zero duty cycle.
8 CT passive Oscillator timing capacitor connection point charged by current set at RT and discharged to GND through 2.5 mA current sink to initiate next switching cycle.
9 RT passive Oscillator timing resistor connection point with nominally 1.25 V potential; current mirror is limited to maximum 100 μA requiring RT greater than 12.5 kΩ.
10 SYNC bidirectional Bidirectional TTL-compatible pin for external synchronization; outputs oscillator pulses during dead time when free-running, or accepts external clock input when RT forced above 4.4 V; forces outputs low when SYNC high above 2 V.
11 AOUT output High-current gate drive output providing ±200 mA continuous and ±500 mA peak for external MOSFETs; includes inherent anti-parallel body diodes to clamp voltage swings without external clamp diodes.
12 GND power_in Reference ground and power ground for all device functions; bypass and timing capacitors must be connected as close as possible to this pin.
13 VC power_in Power supply input for FET drive outputs with input range 2.5 V to 15 V; must be capacitively bypassed for proper operation.
14 BOUT output High-current gate drive output providing ±200 mA continuous and ±500 mA peak for external MOSFETs; alternates with AOUT and includes inherent anti-parallel body diodes to clamp voltage swings.
15 VIN power_in Power supply input with 8 V to 15 V range internally regulated by 15 V shunt regulator with 25 mA maximum supply current; must be bypassed to GND with 0.01 μF minimum ceramic capacitor.
16 SHUTDOWN input Enhanced protection input that forces AOUT and BOUT low when driven above 1 V threshold (nominal 1.0 V for UCC2806) with 75-150 ns delay to output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: UCC2806DW
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ucc2806dw-etched.step / ucc2806dw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc2806dw.step / ucc2806dw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 20f40789e136b23c, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF