UCC28061QDRQ1

{
  "slug": "ucc28061qdrq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments AC-DC Controllers & Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power supply chip",
    "ucc28061qdrq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ucc28061qdrq1.kicad_sym",
    "ucc28061qdrq1.kicad_mod",
    "ucc28061qdrq1.glb",
    "ucc28061qdrq1.step",
    "ucc28061qdrq1.lbr",
    "docs/hero.png",
    "docs/ucc28061qdrq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ucc28061qdrq1-hero.glb",
    "ucc28061qdrq1-hero.overlay.json",
    "ucc28061qdrq1-etched.glb"
  ],
  "component": {
    "mpn": "UCC28061QDRQ1",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Power Supply Chip",
    "subcategory": "AC-DC Controllers & Regulators",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ucc28061-q1",
    "parts": {
      "symbol": "ucc28061qdrq1.kicad_sym",
      "footprint": "ucc28061qdrq1.kicad_mod",
      "model_3d": "ucc28061qdrq1-hero.glb",
      "model_3d_plain": "ucc28061qdrq1-etched.glb",
      "model_3d_step": "ucc28061qdrq1-etched.step",
      "model_3d_step_plain": "ucc28061qdrq1.step",
      "lbr": "ucc28061qdrq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2870880",
      "digikey": "296-41050-2-ND",
      "mouser": "595-UCC28061QDRQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-23T12:44:44Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-41050-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-UCC28061QDRQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "ZCDB",
        "type": "input",
        "description": "Zero current detection input for phase B, clamped at 0 V and 3 V, expects a negative edge (falling threshold ~1 V, rising ~1.7 V) via a series resistor limiting clamp current to less than ±3 mA."
      },
      {
        "number": "2",
        "name": "VSENSE",
        "type": "input",
        "description": "Output DC voltage sense input from a divider across the converter output with 6 V error amplifier reference; pulling it low disables the outputs, and open-loop protection pulls it low if disconnected."
      },
      {
        "number": "3",
        "name": "TSET",
        "type": "input",
        "description": "PWM on-time programming input; a resistor to AGND sets on-time versus COMP voltage and the minimum period at the gate drive outputs."
      },
      {
        "number": "4",
        "name": "PHB",
        "type": "input",
        "description": "Phase B enable input that turns channel B on/off (doubling channel A on-time when disabled); connect to COMP for automatic phase management or to VREF to disable it."
      },
      {
        "number": "5",
        "name": "COMP",
        "type": "output",
        "description": "Transconductance error amplifier output (high-impedance current source) for loop compensation to AGND; on-time is proportional to COMP minus ~125 mV and COMP is pulled low during soft-start events."
      },
      {
        "number": "6",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground for signal bypass capacitors, compensation components and analog returns, connected to power ground at a single point."
      },
      {
        "number": "7",
        "name": "VINAC",
        "type": "input",
        "description": "Input AC voltage sense from a divider across the rectified mains; below the brownout threshold longer than the filter time both drives are disabled (recommended input range 0 to 6 V)."
      },
      {
        "number": "8",
        "name": "HVSEN",
        "type": "input",
        "description": "High voltage output sense for redundant fail-safe overvoltage protection and power-good enable of a downstream converter; must never fall below 0.8 V during operation."
      },
      {
        "number": "9",
        "name": "PWMCNTL",
        "type": "output",
        "description": "Open-drain PWM enable output that goes low when HVSEN is in the good region and ZCDA/ZCDB are switching correctly, otherwise high impedance."
      },
      {
        "number": "10",
        "name": "CS",
        "type": "input",
        "description": "Current sense input that goes negative with input current; cycle-by-cycle overcurrent turns off both gate drives at about -200 mV and releases at about -15 mV."
      },
      {
        "number": "11",
        "name": "GDB",
        "type": "output",
        "description": "Channel B gate drive output to the power FET gate, with an optional 5-10 Ω series resistor to reduce ringing."
      },
      {
        "number": "12",
        "name": "VCC",
        "type": "power_in",
        "description": "Bias supply input of 14 V to 21 V, bypassed with 0.1 µF to PGND, and must deliver 6 mA dc plus gate charging current."
      },
      {
        "number": "13",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for the integrated circuit, connected to AGND through a separate short trace to isolate gate driver noise."
      },
      {
        "number": "14",
        "name": "GDA",
        "type": "output",
        "description": "Channel A gate drive output to the power FET gate, with an optional 5-10 Ω series resistor to reduce ringing."
      },
      {
        "number": "15",
        "name": "VREF",
        "type": "power_out",
        "description": "6 V reference output bypassed with 0.1 µF to AGND that can bias circuits needing less than 2 mA total and turns off during VCC undervoltage and VSENSE disable."
      },
      {
        "number": "16",
        "name": "ZCDA",
        "type": "input",
        "description": "Zero current detection input for phase A, clamped at 0 V and 3 V, expects a negative edge (falling threshold ~1 V, rising ~1.7 V) via a series resistor limiting clamp current to less than ±3 mA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers for ZCDA/ZCDB/GDA/GDB/PGND/VREF/etc. taken from the terminal function table (consistent "
        ],
        "pages_sent": 10,
        "cost_usd": 0.1183,
        "at": "2026-10-23T12:44:30"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ucc28061-q1",
        "pages": 33,
        "sha256": "0916ffb443732489",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ucc28061qdrq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ucc28061qdrq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b560c7384e633f69d60f6d1cd637d641e1699b297e3d5e65127c9d5e6991336a",
        "checked": "2026-10-23",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}