component
UCC2804QDREP
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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UCC2804QDREP
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC2804QDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the output of the error amplifier and the input of the PWM comparator, and it can both source and sink current, with zero duty cycle commanded by externally forcing it to GND. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and its lead length and stray capacitance should be kept as short and small as possible for best stability. |
| 3 | CS | input | CS is the input to the PWM and overcurrent current-sense comparators, with leading-edge blanking disconnecting it for 100 ns after the rising edge of OUT, and exceeding the overcurrent threshold triggers a soft-start cycle. |
| 4 | RC | passive | RC is the oscillator timing pin, with a timing resistor between REF and RC (10 kΩ to 200 kΩ recommended, never less than 10 kΩ) and a timing capacitor from RC to GND (100 pF to 1000 pF recommended). |
| 5 | GND | power_in | GND is the reference ground and power ground for all functions on the part. |
| 6 | OUT | output | OUT is the high-current power driver output for a power MOSFET gate, capable of peak currents exceeding 750 mA, and it is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the power input, normally powered through a current-limiting resistor and to be bypassed to GND with a ceramic capacitor placed as close to the pin as possible. |
| 8 | REF | power_out | REF is the voltage reference for the error amplifier and other internal functions, requires a minimum 0.1 µF ceramic bypass to GND, and needs additional bypassing for external loads above 2.5 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC2804QDREP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc2804qdrep-etched.step/ucc2804qdrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2804qdrep.step/ucc2804qdrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
bcffdce038e42e92, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).