# UCC2801QDRQ1

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UCC2801QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and PWM comparator input; the low-output-impedance 2MHz amplifier can source and sink current, and forcing COMP to GND externally gives zero duty cycle, with full-cycle soft start clamping the maximum COMP voltage. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and its trace should be kept as short as possible with minimal stray capacitance for best stability. |
| 3 | CS | input | CS is the current-sense input to the PWM and over-current comparators, with 100ns internal leading-edge blanking after OUT rises and an over-current threshold of 1.42 V to 1.68 V (1.55 V typical). |
| 4 | RC | input | RC is the oscillator timing pin, with the timing resistor connected from REF to RC (recommended 10k to 200k, never below 10k) and the timing capacitor from RC to GND (recommended 100pF to 1000pF). |
| 5 | GND | power_in | GND is the reference ground and power ground for all functions on the device, and TI recommends separating the signal return path from the high-current gate driver path. |
| 6 | OUT | output | OUT is the high-current totem-pole gate driver output that drives power MOSFET gates with peak current above ±750 mA, and it is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the device supply input, normally fed through a current-limiting resistor, with a recommended supply of 11 V from a low-impedance source, an absolute maximum of 12 V, a maximum current of 30 mA, and a 1 µF plus 0.1 µF ceramic bypass placed close to the pin. |
| 8 | REF | output | REF is the 5 V error amplifier voltage reference and logic supply, which must be bypassed to GND with at least 0.1 µF ceramic capacitance placed close to the pin, is pulled low through 5 kΩ when VCC is between 1 V and the UVLO threshold, and needs additional bypass for external loads above 2.5 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UCC2801QDRQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ucc2801qdrq1-etched.step` / `ucc2801qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2801qdrq1.step` / `ucc2801qdrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2803-q1) (47 pp, sha256 `f3617bb600d56d65`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc2801qdrq1-datasheet.pdf)