# UCC2801MDREP

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UCC2801MDREP from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and PWM comparator input; it is a low-output-impedance 2 MHz op amp that can source and sink current but is internally current limited, and forcing COMP to GND commands zero duty cycle. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and its lead length and stray capacitance should be kept as short and small as possible for best stability. |
| 3 | CS | input | CS is the input to the PWM and overcurrent comparators, with 100 ns leading-edge blanking after the OUT rising edge; exceeding the overcurrent threshold (1.42 V to 1.68 V, 1.55 V typical) triggers a soft start cycle and the pin is intended for fault sensing only. |
| 4 | RC | passive | RC is the oscillator timing pin, with timing resistor RT from REF to RC and timing capacitor CT from RC to GND; RT should be between 10 kΩ and 200 kΩ, CT between 100 pF and 1000 pF, and RT must never be less than 10 kΩ. |
| 5 | GND | power_in | GND is the reference ground and power ground for all functions on the device. |
| 6 | OUT | output | OUT is the high-current totem-pole gate driver for a power MOSFET, capable of peak currents exceeding 750 mA with absolute output current rated at ±1 A, and is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the device power input, normally fed through a current limiting resistor, and must not exceed 12 V absolute maximum when driven from a low impedance source with ICC limited to 30 mA. |
| 8 | REF | output | REF is the 5 V voltage reference for the error amplifier and other internal functions and logic supply, pulled to ground through 5 kΩ when VCC is between 1 V and the UVLO threshold, requiring a minimum 0.1 µF ceramic bypass to GND and additional bypass for external loads above 2.5 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UCC2801MDREP`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ucc2801mdrep-etched.step` / `ucc2801mdrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2801mdrep.step` / `ucc2801mdrep.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2801-ep) (19 pp, sha256 `bcffdce038e42e92`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc2801mdrep-datasheet.pdf)