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UCC27624QDGNRQ1

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TEXAS INSTRUMENTS Global Sourcing Parts, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCC27624QDGNRQ1

TEXAS INSTRUMENTS · Global Sourcing Parts · HVSSOP-8

UCC27624QDGNRQ1 from TEXAS INSTRUMENTS, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ENA input Enable input for Channel A; LOW disables the Channel A output regardless of INA, HIGH enables it, floating enables by default via internal pullup, and connect to VDD if unused.
2 INA input Non-inverting input to Channel A; OUTA is held LOW if INA is floating due to an internal pulldown, and connect to GND if unused.
3 GND power_in Ground: all signals are referenced to this pin.
4 INB input Non-inverting input to Channel B; OUTB is held LOW if INB is floating due to an internal pulldown, and connect to GND if unused.
5 OUTB output Channel B output.
6 VDD power_in Bias supply input (4.5V to 26V operating); bypass with two ceramic capacitors, generally ≥1 µF and 0.1 µF, referenced to GND.
7 OUTA output Channel A output.
8 ENB input Enable input for Channel B; LOW disables the Channel B output regardless of INB, HIGH enables it, floating enables by default via internal pullup, and connect to VDD if unused.
9 Thermal Pad passive Connect to GND through a large copper plane; this pad is not a low-impedance path to GND and is not directly connected to any package lead.

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package HVSSOP-8
Category Global Sourcing Parts
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.3 30 V 5
Output voltage DC, OUTA/OUTB -0.3 V DC; max is VDD + 0.3 V 5
Output voltage 200ns pulse, OUTA/OUTB -2 V 200ns pulse; max is VDD + 3 V 5
Input voltage INA, INB, ENA, ENB -10 30 V 5
Operating junction temperature TJ -40 150 °C 5
Lead temperature soldering 300 °C Soldering, 10 sec 5
Lead temperature reflow 260 °C Reflow 5
Storage temperature Tstg -65 150 °C 5
ESD HBM V(ESD) -2000 2000 V Human body model, AEC Q100-002 5
ESD CDM V(ESD) -1000 1000 V Charged-device model, AEC Q100-011 5
Supply voltage VDD 4.5 12 26 V 5
Input voltage INA, INB, ENA, ENB -10 26 V 5
Output voltage OUTA, OUTB 0 V max is VDD 5
Operating junction temperature TJ -40 150 °C 5
Junction-to-ambient thermal resistance RθJA 48.9 °C/W DGN, 8 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 71.8 °C/W DGN, 8 pins 5
Junction-to-board thermal resistance RθJB 22.3 °C/W DGN, 8 pins 5
Junction-to-top characterization parameter ψJT 2.6 °C/W DGN, 8 pins 5
Junction-to-board characterization parameter ψJB 22.3 °C/W DGN, 8 pins 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 4.5 °C/W DGN, 8 pins 5
VDD quiescent supply current IVDDq 300 450 μA VINx = 3.3 V, VDD = 3.4 V, ENx = VDD 6
VDD static supply current IVDD 0.6 1 mA VINx = 3.3 V, ENx = VDD 6
VDD static supply current IVDD 0.7 1 mA VINx = 0 V, ENx = VDD 6
VDD operating current IVDDO 3.2 3.8 mA fSW = 1000 kHz, ENx = VDD, VINx = 0 V, 3.3 V PWM 6
VDD disable current IDIS 0.8 1.1 mA VINx = 3.3 V, ENx = 0 V 6
VDD UVLO rising threshold VVDD_ON 3.8 4.1 4.4 V 6
VDD UVLO falling threshold VVDD_OFF 3.5 3.8 4.1 V 6
VDD UVLO hysteresis VVDD_HYS 0.3 V 6
Input signal high threshold VINx_H 1.8 2 2.3 V Output High, ENx = HIGH 6
Input signal low threshold VINx_L 0.8 1 1.2 V Output Low, ENx = HIGH 6
Input signal hysteresis VINx_HYS 1 V 6
INx pin pulldown resistor RINx 120 kΩ INx = 3.3 V 6
Enable signal high threshold VENx_H 1.8 2 2.3 V Output High, INx = HIGH 6
Enable signal low threshold VENx_L 0.8 1 1.2 V Output Low, INx = HIGH 6
Enable signal hysteresis VENx_HYS 1 V 6
EN pin pullup resistance RENx 200 kΩ ENx = 0 V 6
Peak output source current ISRC 5 A VDD = 12 V, CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz 6
Peak output sink current ISNK -5 A VDD = 12 V, CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz 6
Pullup resistance ROH 5 8.5 Ω IOUT = -50 mA 6
Pulldown resistance ROL 0.6 1.1 Ω IOUT = 50 mA 6
Rise time tRx 6 10 ns CLOAD = 1.8 nF, 20% to 80%, Vin = 0 V, 3.3 V 7
Fall time tFx 10 14 ns CLOAD = 1.8 nF, 90% to 10%, Vin = 0 V, 3.3 V 7
Turn-on propagation delay tD1x 17 27 ns CLOAD = 1.8 nF, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C 7
Turn-off propagation delay tD2x 17 27 ns CLOAD = 1.8 nF, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C 7
Enable propagation delay tD3x 17 27 ns CLOAD = 1.8 nF, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C 7
Disable propagation delay tD4x 17 27 ns CLOAD = 1.8 nF, Fsw = 500 kHz, 50% duty cycle, TJ = 125°C 7
Delay matching between two channels tM 1 2 ns CLOAD = 1.8 nF, Vin = 0 V, 3.3 V, Fsw = 500 kHz, 50% duty cycle, INA = INB 7
Minimum input pulse width tPWmin 10 15 ns CL = 1.8 nF, Vin = 0 V, 3.3 V, Fsw = 500 kHz, Vo > 1.5 V 7

CAD (KiCad official)

  • Symbol: UCC27624QDGNRQ1
  • Footprint: Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm
  • 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: ucc27624qdgnrq1-etched.step / ucc27624qdgnrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc27624qdgnrq1.step / ucc27624qdgnrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (51 pp, sha256 4799b0cc745838fe, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF