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CAD + datasheet + .step

Ray ·2c29ccd331 ·1mo ago ·parent 6d8138c
1 file changed +121−8
page.json+121−8
@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ucc27524",+  "title": "UCC27524 Dual Gate Driver",+  "brief": "Dual 5 A high-speed low-side MOSFET/IGBT gate driver with matched delays.",   "version": "0.1.0",-  "type": "component",-  "description": "Dual 5 A high-speed low-side MOSFET/IGBT gate driver with matched delays.",+  "license": "CC-BY-SA-4.0",   "tags": [     "gate-driver",     "mosfet-driver",@@ -12,6 +15,121 @@     "ti",     "soic-8"   ],+  "component": {+    "mpn": "UCC27524",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Driver",+    "subcategory": "Gate Driver",+    "datasheet": "https://www.ti.com/lit/ds/symlink/ucc27524.pdf",+    "parts": {+      "symbol": "ucc27524.kicad_sym",+      "footprint": "ucc27524.kicad_mod",+      "model_3d": "ucc27524.glb",+      "model_3d_step": "ucc27524.step"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "ENA",+        "type": "input",+        "description": "Enable input for Channel A. Bias LOW to disable OUTA regardless of INA state; bias HIGH or leave floating to enable Channel A. Internally pulled up to VDD for pin-to-pin compatibility with UCC27324 N/C pin."+      },+      {+        "number": "2",+        "name": "INA",+        "type": "input",+        "description": "Non-inverting logic input to Channel A. Drives OUTA high when HIGH. OUTA is held LOW if INA is unbiased or floating due to internal pulldown (~120 k\u03a9). TTL/CMOS thresholds with ~1V hysteresis; can accept -5V (D/DGN pkg)."+      },+      {+        "number": "3",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground return. All signals and supply voltages are referenced to this pin."+      },+      {+        "number": "4",+        "name": "INB",+        "type": "input",+        "description": "Non-inverting logic input to Channel B. Drives OUTB high when HIGH. OUTB is held LOW if INB is unbiased or floating due to internal pulldown (~120 k\u03a9). TTL/CMOS thresholds with ~1V hysteresis; can accept -5V (D/DGN pkg)."+      },+      {+        "number": "5",+        "name": "OUTB",+        "type": "output",+        "description": "Gate-drive output for Channel B. Rail-to-rail push-pull driver capable of 5A peak source/sink into MOSFET/IGBT gates. Held LOW during VDD UVLO and when INB is floating."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "Bias supply input. 4.5V to 18V recommended operating range (20V absolute max). Bypass with a low-ESR ceramic capacitor (typ. 1 \u00b5F) directly to GND. UVLO rising threshold ~4.1V."+      },+      {+        "number": "7",+        "name": "OUTA",+        "type": "output",+        "description": "Gate-drive output for Channel A. Rail-to-rail push-pull driver capable of 5A peak source/sink into MOSFET/IGBT gates. Held LOW during VDD UVLO and when INA is floating."+      },+      {+        "number": "8",+        "name": "ENB",+        "type": "input",+        "description": "Enable input for Channel B. Bias LOW to disable OUTB regardless of INB state; bias HIGH or leave floating to enable Channel B. Internally pulled up to VDD for pin-to-pin compatibility with UCC27324 N/C pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/ucc27524.pdf",+        "pages": 50,+        "sha256": "57d2e9b2b8063627",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Type": "Dual low-side gate driver",+      "Peak output current": "5 A source/sink",+      "Supply voltage": "4.5 V to 18 V",+      "Rise/fall time": "7 ns / 6 ns into 1.8 nF",+      "Propagation delay": "13 ns typ (matched)",+      "Inputs": "TTL/CMOS compatible",+      "Operating temperature": "-40 C to 140 C"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "MOSFET gate driver",+    "5A gate driver",+    "low-side driver",+    "fast switching driver"+  ],+  "discovery_pitch": "Two 5 A low-side drivers with tightly matched delays to switch power MOSFETs and IGBTs fast and cleanly.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -28,10 +146,5 @@     "docs/ucc27524-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file