# UCC2583DTR

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-14

UCC2583DTR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | power_out | Precision 5V reference output that stays off until VDD exceeds 9V and turns off below 8.4V; bypass to COM. |
| 2 | INV | input | Inverting input of the voltage error amplifier, fed by a resistive divider between REF and -VO. |
| 3 | COMP | output | Voltage error amplifier output into the PWM comparator, with loop compensation connected between COMP and INV. |
| 4 | SS | input | Soft start pin where a capacitor to REF programs the soft start time, controlling the PWM comparator during startup. |
| 5 | SYNC | input | Synchronization input tied to a signal representative of the secondary power pulse, with trip levels of about 1.0V and 0.0V and not to go more than 0.3V below ground. |
| 6 | RAMP | passive | PWM comparator ramp input with a capacitor to COM and a resistor to REF setting the charging rate, discharged by an internal current source on sync or at the 4V threshold. |
| 7 | COM | power_in | Signal ground for the chip, connected to the positive terminal of the output voltage being regulated. |
| 8 | ILIM | input | Inverting input of the current error amplifier that sets the DC limit for the output current. |
| 9 | CAO | output | Current error amplifier output feeding the PWM comparator, with an integrating capacitor between ILIM and CAO providing averaging. |
| 10 | CS | input | Non-inverting input of the current error amplifier receiving the sensed current signal from the current sense resistor. |
| 11 | VDD | power_in | Chip power supply bypassed to COM, needing 9V to start and 8.4V to stay operational, with an internal shunt clamp limiting it to 14V. |
| 12 | VD | power_in | Power supply for the output driver, to be tied to VDD in the application. |
| 13 | GATE | output | Gate drive output for the power switch FET with 0.5A sink/1.5A source capability and very low off-state impedance. |
| 14 | PCOM | power_in | Power ground for the chip, connected to the source terminal of the regulated MOSFET, rated -0.2V to 0.2V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `UCC2583DTR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `ucc2583dtr-etched.step` / `ucc2583dtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2583dtr.step` / `ucc2583dtr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2583) (22 pp, sha256 `76364dd324d0f261`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc2583dtr-datasheet.pdf)