component

UCC2580DTR-3

Public Made by Adom

by adom

Texas Instruments AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCC2580DTR-3

Texas Instruments · AC-DC Controllers And Regulators · SOIC-16

UCC2580DTR-3 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DELAY passive A resistor from DELAY to GND programs the nonoverlap delay between OUT1 and OUT2 (Delay1 and Delay2); absolute maximum 5.3V and 5mA.
2 LINE input Hysteretic comparator input with 5.0V on and 4.5V off thresholds, used to sense input line voltage and turn off OUT1 when the line is low.
3 VDD power_in Chip supply pin bypassed to PGND, with a 15V internal shunt clamp (10mA max) and UVLO of 9V on / 8.5V off for the -3 version; absolute maximum 16V.
4 OUT1 output Gate drive output for the main switch, capable of sourcing up to 0.5A and sinking 1A.
5 PGND power_in Ground connection for the gate drivers, connected to GND at a single point so no high frequency switching currents flow in the ground plane.
6 OUT2 output Gate drive output for the auxiliary switch with 0.3A drive current capability; inverted in the -3 version to drive NMOS FETs.
7 CLK output Oscillator clock output from a low impedance CMOS driver, high during guaranteed off time, able to synchronize up to five other UCC3580 PWMs.
8 GND power_in Signal ground.
9 RAMP input Feedforward ramp input where resistor R4 to input voltage and capacitor CR to GND set the ramp, with the flux comparator clamping volt-second product at 3.3V.
10 OSC2 passive Oscillator programming pin where a resistor to the timing capacitor controls the guaranteed off time.
11 OSC1 passive Oscillator programming pin where a resistor to the timing capacitor sets the maximum on time.
12 EAOUT output Error amplifier output and input to the PWM comparator, with loop compensation components connected from EAOUT to EAIN.
13 EAIN input Inverting input to the error amplifier whose noninverting input is internally set to 2.5V, used for feedback and loop compensation.
14 REF power_out Precision 5.0V reference output supplying up to 5mA to external circuits, bypassed to GND with a 1uF capacitor.
15 SS passive A capacitor from SS to ground programs the soft start time, charged by an internal 20uA current once startup conditions are met.
16 SHTDWN input Comparator input with a 0.5V threshold that stops the chip, holding OUT1 low while OUT2 continues to oscillate.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: UCC2580DTR-3
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: ucc2580dtr-3-etched.step / ucc2580dtr-3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc2580dtr-3.step / ucc2580dtr-3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 22578373a5379f7a, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF