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Contents

README

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UCC21750DWR

Texas Instruments · Isolators - Gate Drivers · SOIC-16-300mil

UCC21750DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN input Isolated analog sensing input with voltage range 0.6 V to 4.5 V; parallelize small capacitor to COM for noise immunity; tie to COM if unused.
2 DESAT input Desaturation protection input referenced to COM with detection threshold 8.5 V to 9.8 V; tie to COM if unused.
3 COM power_in Common ground reference for output side, connected to emitter of IGBT or source of SiC-MOSFET.
4 OUTH output Gate driver output pullup with peak source current ±10 A and high-level output voltage 17.5 V at IOUT = -0.2 A.
5 VDD power_in Positive gate drive supply rail with operating range 13 V to 33 V; bypass with >10-μF capacitor to COM.
6 OUTL output Gate driver output pulldown with peak sink current ±10 A and low-level output voltage 60 mV at IOUT = 0.2 A.
7 CLMPI input Internal active miller clamp input connected directly to power transistor gate; threshold voltage 1.5 V to 2.5 V referenced to VEE; leave floating or tie to VEE if unused.
8 VEE power_in Negative gate drive supply rail with operating range -17.5 V to +0.3 V referenced to COM; bypass with >10-μF capacitor to COM.
9 GND power_in Input power supply and logic ground reference; bypass with >1-μF capacitor to VCC.
10 IN+ input Non-inverting gate driver control input with high threshold 1.85 V to 2.31 V (VCC = 3.3 V) and low threshold 0.99 V to 1.52 V; tie to VCC if unused.
11 IN- input Inverting gate driver control input with high threshold 1.85 V to 2.31 V (VCC = 3.3 V) and low threshold 0.99 V to 1.52 V; tie to GND if unused.
12 RDY output Power good output (open drain) indicating power supply status of VCC-GND and VDD-COM; pulled to GND during UVLO condition.
13 FLT output Active-low fault alarm output (open drain) signaling overcurrent or short circuit detection; pulled to GND on fault condition.
14 RST/EN input Reset and enable pin with dual function: (1) enable/shutdown of output by pulling low >1000 ns, (2) reset DESAT fault by pulling low >1000 ns after fault mute time; internally pulled down 50 kΩ.
15 VCC power_in Input power supply with operating range 3.0 V to 5.5 V; bypass with >1-μF capacitor to GND.
16 APWM output Isolated analog PWM output with frequency 380 kHz to 420 kHz; duty cycle 7.5% to 88.5% for AIN voltage 4.5 V to 0.6 V respectively; leave floating if unused.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: UCC21750DWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ucc21750dwr-etched.step / ucc21750dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc21750dwr.step / ucc21750dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (53 pp, sha256 3c71f631cf74e352, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF