UCC21738QDWRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	ASC	input	Active high input that enables the active short circuit function to force the output high during system failure events; tie to COM if unused.
2	OC	input	Overcurrent detection input for SenseFET, DESAT, and shunt resistor sensing; tie to COM if unused.
3	COM	power_in	Common ground reference that connects to the emitter pin for IGBT or the source pin for SiC MOSFET.
4	OUTH	output	Gate driver pull-up output.
5	VDD	power_in	Positive gate drive supply rail, to be bypassed with a >10-µF capacitor to COM placed close to the pin to support the specified source peak current.
6	OUTL	output	Gate driver pull-down output.
7	CLMPE	output	External active Miller clamp control that connects to the gate of the external Miller clamp MOSFET; leave floating if unused.
8	VEE	power_in	Negative gate drive supply rail, to be bypassed with a >10-µF capacitor to COM placed close to the pin to support the specified sink peak current.
9	GND	power_in	Input power supply and logic ground reference.
10	IN+	input	Noninverting gate driver control input; tie to VCC if unused.
11	IN-	input	Inverting gate driver control input; tie to GND if unused.
12	RDY	output	Open-drain power-good output for VCC-GND and VDD-COM that can be paralleled with other RDY signals.
13	FLT	output	Open-drain active-low fault alarm output asserted upon overcurrent or short circuit that can be paralleled with other faults.
14	RST/EN	input	Enables or shuts down the output side (regular turn-off when set low) and resets an OC condition on FLT when held low for more than 1000 ns; tie to IN+ for automatic reset.
15	VCC	power_in	Input power supply from 3 V to 5.5 V, to be bypassed with a >1-µF capacitor to GND placed close to the pin.
16	APWM	output	Isolated PWM output that monitors the ASC pin status; leave floating if unused.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Power Management (PMIC)
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VCC supply voltage (VCC - GND)	VCC	-0.3		6	V	VCC - GND	4
VDD supply voltage (VDD - COM)	VDD	-0.3		36	V	VDD - COM	4
VEE supply voltage (VEE - COM)	VEE	-17.5		0.3	V	VEE - COM	4
VMAX voltage (VDD - VEE)	VMAX	-0.3		36	V	VDD - VEE	4
ASC input voltage	ASC	-0.3		6	V	Reference to COM	4
OC input voltage	OC	-0.3		6	V	Reference to COM	4
CLMPE voltage	CLMPE	-0.3		5	V	Reference to VEE	4
Junction temperature	TJ	-40		150	°C		4
Storage temperature	Tstg	-65		150	°C		4
VCC supply voltage (VCC - GND)	VCC	3		5.5	V	VCC-GND	4
VDD supply voltage (VDD - COM)	VDD	13		33	V	VDD-COM	4
VEE supply voltage (VEE - COM)	VEE	-16		0	V	VEE-COM	4
VMAX voltage (VDD - VEE)	VMAX			33	V	VDD-VEE	4
ASC input voltage	ASC	0		5	V	Reference to COM	4
Minimum RST/EN pulse width to reset fault	tRST/EN	1000			ns	Minimum pulse width that reset the fault	4
Ambient temperature	TA	-40		125	°C		4
Junction temperature	TJ	-40		150	°C		5
VCC UVLO on threshold	VVCC_ON	2.55	2.7	2.85	V	VCC - GND	7
VCC UVLO off threshold	VVCC_OFF	2.35	2.5	2.65	V	VCC - GND	7
VDD UVLO on threshold	VVDD_ON	10.5	11.4	12.8	V	VDD - COM	7
VDD UVLO off threshold	VVDD_OFF	9.9	10.6	11.8	V	VDD - COM	7
VCC quiescent current	IVCCQ	2.5	3	4	mA	OUT(H) = High, fS = 0Hz	7
VCC quiescent current	IVCCQ	1.45	2	2.75	mA	OUT(L) = Low, fS = 0Hz	7
VDD quiescent current	IVDDQ	2.4	3.1	5.3	mA	OUT(H) = High, fS = 0Hz	7
VDD quiescent current	IVDDQ	2.2	2.9	4.7	mA	OUT(L) = Low, fS = 0Hz	7
IN+, IN- and RST/EN deglitch filter time (ON and OFF)	TINFIL	28	40	60	ns	fS = 50kHz	7
Deglitch filter time to reset FLT	TRSTFIL	500	650	800	ns		7
Output active pull down on OUTL	VOUTPD	1.5	2	2.5	V	IOUTL(typ) = 0.1×IOUTL(typ), VDD=OPEN, VEE=COM	7
Miller clamp threshold voltage	VCLMPTH	1.5	2	2.5	V	Reference to VEE	8
Miller clamp output high voltage	VCLMPE	4.8	5	5.3	V		8
Peak clamp sink current	ICLMPEL	0.12	0.25	0.37	A		8
OC detection threshold	VOCTH	0.63	0.7	0.77	V		8
OC fault deglitch filter	tOCFIL	95	120	180	ns		8
OC propagation delay to OUTL 90%	tOCOFF	150	270	400	ns		8
OC to FLT low delay	tOCFLT	300	530	750	ns		8
Soft turn-off current on fault condition	ISTO	500	900	1200	mA	VDD-VEE = 20 V, OUTL = 8 V	8
ASC input low threshold	VASCL	1.35	1.5	1.71	V		8
ASC input high threshold	VASCH	2.7	2.9	3.17	V		8
ASC to output rising edge delay	tASC_r	390	660	1120	ns		8
ASC to output falling edge delay	tASC_f	152	300	477	ns		8
APWM output frequency	fAPWM	360	400	440	kHz	VASC=2.5V	8
APWM duty cycle	DAPWM	9	11.5	13.5	%	VASC=0.6V	8
APWM duty cycle	DAPWM	48.5	50	51.5	%	VASC=2.5V	8
APWM duty cycle	DAPWM	87.5	90	92.5	%	VASC=4.5V	8
Common-mode transient immunity	CMTI	150			V/ns	VCM = 1500 V	8
Propagation delay time low-to-high	tPDLH	60	90	130	ns	VCC = 5.0 V, CL = 100pF	9
Propagation delay time high-to-low	tPDHL	60	90	130	ns	VCC = 5.0 V, CL = 100pF	9
Junction-to-ambient thermal resistance	RθJA		68.3		°C/W	DW (SOIC) 16 pins	5
Junction-to-case (top) thermal resistance	RθJC(top)		27.5		°C/W	DW (SOIC) 16 pins	5
Junction-to-board thermal resistance	RθJB		32.9		°C/W	DW (SOIC) 16 pins	5
Junction-to-top characterization parameter	ΨJT		14.1		°C/W	DW (SOIC) 16 pins	5
Junction-to-board characterization parameter	ΨJB		32.3		°C/W	DW (SOIC) 16 pins	5

CAD (KiCad official)

Symbol: UCC21738QDWRQ1
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: ucc21738qdwrq1-etched.step / ucc21738qdwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc21738qdwrq1.step / ucc21738qdwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (53 pp, sha256 86319bfd941feb0e, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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UCC21738QDWRQ1

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3D Model

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