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Contents

README

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UCC21710QDWRQ1

Texas Instruments · Isolators - Gate Drivers · SOIC-16-300mil

UCC21710QDWRQ1 from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN input Isolated analog sensing input (referenced to COM). Parallel a small capacitor to COM for better noise immunity. Recommended operating input range is 0.6 V to 4.5 V referenced to COM. Tie to COM if unused.
2 OC input Over-current detection input (referenced to COM). Supports lower-threshold detection for SenseFET, DESAT, and shunt-resistor sensing. Tie to COM if unused.
3 COM power_in Common ground reference on the secondary (gate-drive) side. Connect to the emitter of the IGBT or the source of the SiC-MOSFET being driven.
4 OUTH output Gate driver output, pull-up (source) path. Delivers up to 10-A peak source current to the power-transistor gate. Swings between VDD and COM.
5 VDD power_in Positive supply rail for gate-drive voltage (13 V to 33 V VDD-COM recommended, 36 V max VDD-VEE). Bypass with a >10-uF capacitor to COM close to the pin to support specified source peak current.
6 OUTL output Gate driver output, pull-down (sink) path. Sinks up to 10-A peak current from the power-transistor gate. Swings between VDD and VEE.
7 CLMPI input Internal Active Miller Clamp input. Connect this pin directly to the gate of the power transistor to enable the internal 4-A Miller clamp when the gate falls below the clamp threshold. Leave floating or tie to VEE if unused.
8 VEE power_in Negative supply rail for gate-drive voltage (down to -17.5 V VEE-COM abs max). Bypass with a >10-uF capacitor to COM close to the pin to support specified sink peak current.
9 GND power_in Input-side (primary) power supply and logic ground reference.
10 IN+ input Non-inverting gate driver control (PWM) input, referenced to GND. Logic thresholds 0.7xVCC (VIH) / 0.3xVCC (VIL). Tie to VCC if unused.
11 IN- input Inverting gate driver control (PWM) input, referenced to GND. Logic thresholds 0.7xVCC (VIH) / 0.3xVCC (VIL). Tie to GND if unused.
12 RDY output Power-good indicator for VCC-GND and VDD-COM UVLO status. Open-drain output; can be paralleled with other RDY signals. Requires an external pull-up to VCC.
13 FLT output Active-low fault alarm output asserted upon over-current or short-circuit detection. Open-drain output; can be paralleled with other faults. Requires an external pull-up to VCC.
14 RST/EN input Dual-purpose reset/enable input. (1) Enable/shutdown of the output side: turning off pulls the FET off via a normal turn-off. (2) Resets a latched DESAT/FLT fault when held low for >1000 ns; FLT is deasserted on the rising edge of RST/EN. In automatic-reset mode, functions purely as EN. Referenced to GND with 0.7xVCC/0.3xVCC logic thresholds.
15 VCC power_in Input-side (primary) logic power supply, 3.0 V to 5.5 V (6 V abs max). Bypass with a >1-uF capacitor to GND close to the pin.
16 APWM output Isolated Analog Sensing PWM output on the primary (input) side. Reproduces the isolated analog signal from AIN as a PWM duty cycle referenced to GND. Leave floating if unused. Max output current 20 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • UCC21710QDWRQ1

CAD (KiCad official)

  • Symbol: UCC21710QDWRQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ucc21710qdwrq1-etched.step / ucc21710qdwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc21710qdwrq1.step / ucc21710qdwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (61 pp, sha256 a6b1641a6f247e51, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF