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UCC21330BQDRQ1

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TI(德州仪器) , SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCC21330BQDRQ1

TI(德州仪器) · IC · SOIC-16

UCC21330BQDRQ1 from TI(德州仪器), in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INA input Input signal for channel A with TTL/CMOS compatible threshold, pulled low internally if left open; an RC filter of R = 10 Ω to 100 Ω and C = 10 pF to 100 pF is recommended.
2 INB input Input signal for channel B with TTL/CMOS compatible threshold, pulled low internally if left open; an RC filter of R = 10 Ω to 100 Ω and C = 10 pF to 100 pF is recommended.
3 VCCI power_in Primary-side supply voltage (3.0 V to 5.5 V recommended), to be decoupled locally to GND with a low ESR/ESL capacitor placed as close to the device as possible.
4 GND power_in Primary-side ground reference to which all primary-side signals are referenced.
5 DIS input Disables both driver outputs when high and enables both when low; tie to ground if unused, internally pulled high if floating, with an RC filter of R = 0 Ω to 100 Ω and C = 100 pF to 1000 pF recommended when driven from a microcontroller.
6 DT input Dead-time programming pin: float or short to VCCI disables the interlock (outputs may overlap), 1.7 kΩ to 100 kΩ to GND sets minimum dead time, 0 Ω to 150 Ω or short to GND interlocks the outputs, and a ceramic bypass capacitor above 1 nF is not recommended.
7 NC unconnected No internal connection.
8 VCCI power_in Primary-side supply voltage, internally shorted to pin 3.
9 VSSB power_in Ground reference for secondary side B channel.
10 OUTB output Output of driver B, connected to the gate of the B channel transistor through a gate resistor.
11 VDDB power_in Secondary-side power for driver B (9.2 V to 25 V recommended for the B option), to be decoupled locally to VSSB with a low ESR/ESL capacitor placed as close to the device as possible.
12 NC unconnected No internal connection.
13 NC unconnected No internal connection.
14 VSSA power_in Ground reference for secondary side A channel.
15 OUTA output Output of driver A, connected to the gate of the A channel transistor through a gate resistor.
16 VDDA power_in Secondary-side power for driver A (9.2 V to 25 V recommended for the B option), to be decoupled locally to VSSA with a low ESR/ESL capacitor placed as close to the device as possible.

Key specifications

Parameter Value
Manufacturer TI(德州仪器)
Package SOIC-16
Category
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input bias supply voltage VCCI to GND VCCI -0.3 6 V 4
Output bias supply voltage VDDA, VDDB to VSS VDDx -0.3 30 V 4
Output signal DC voltage OUTx -0.3 0.3 V OUTA to VSSA, OUTB to VSSB; max printed as VDDA/B + 0.3 4
Output signal transient voltage OUTx -2 0.3 V 200-ns; max printed as VDDA/B + 0.3 4
Input signal DC voltage INA, INB -0.3 0.3 V INA, INB to GND; max printed as VCCI + 0.3, must not exceed 6 V 4
DT, DIS voltage -0.3 0.3 V DT, DIS to GND; max printed as VCCI + 0.3, must not exceed 6 V 4
Channel to channel isolation voltage /VSSA-VSSB/ 1500 V D package 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human body model, AEC Q100-002 4
ESD CDM V(ESD) -1000 1000 V Charged device model, AEC Q100-011 4
Input bias pin supply voltage VCCI 3 5.5 V 4
Output bias supply voltage VDDA, VDDB 9.2 25 V UCC21330B-Q1 - 8V UVLO 4
Junction temperature TJ -40 150 °C 4
Junction-to-ambient thermal resistance RθJA 80.2 °C/W D 16 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 36.6 °C/W D 16 pins 4
Junction-to-board thermal resistance RθJB 45 °C/W D 16 pins 4
Junction-to-top characterization parameter ΨJT 28 °C/W D 16 pins 4
Junction-to-board characterization parameter ΨJB 44.3 °C/W D 16 pins 5
Maximum power dissipation (both sides) PD 950 mW VCCI = 5V, VDDA/VDDB = 20V, INA/B = 3.3V, 460kHz 50% duty cycle square wave, CL=2.2nF, TJ=150℃, TA=25℃ 5
Maximum power dissipation by transmitter side PDI 50 mW 5
Maximum power dissipation by each driver side PDA, PDB 450 mW 5
VCC quiescent current IVCC 1.4 2 mA VINx = 0 V, DIS = GND; VCC=3.3V 8
VCC quiescent current IVCC 4.2 4.8 mA VINx = VCC, DIS = GND; VCC=3.3V 8
VCC current at 500kHz IVCC 2.7 3.2 mA VINx PWM at 0V to VCC at fSW = 500kHz, DIS = GND; VCC=3.3V 8
VDDx quiescent current IVDDx 1.2 2 mA VINx = 0 V, DIS = GND 8
VDDx quiescent current IVDDx 1.4 2.3 mA VINx = 0 V, DIS = GND; VDD=25V 8
VDDx quiescent current IVDDx 1.4 2.2 mA VINx = VCC, DIS = GND 8
VDDx quiescent current IVDDx 1.5 2.5 mA VINx = VCC, DIS = GND; VDD=25V 8
VDDx current at 500kHz IVDDx 2.7 4.4 mA VINx PWM at 0V to VCC at fSW = 500kHz, DIS = GND 8
VDDx current at 500kHz, 25V IVDDx 2.7 4.4 mA VINx PWM at 0V to VCC at fSW = 500kHz, DIS = GND; VDD=25V 8
VCC UVLO Rising Threshold VVCC_ON 2.55 2.7 2.85 V 8
VCC UVLO Falling Threshold VVCC_OFF 2.35 2.5 2.65 V 8
VCC UVLO Threshold Hysteresis VVCC_HYS 0.2 V 8
VCC UVLO ON Delay tVCC+ to OUT 18 42 80 µs 8
VCC UVLO OFF Delay tVCC- to OUT 0.5 1.2 7 µs 8
VCC UVLO Deglitch Filter tVCCFIL 0.4 0.9 3.1 µs 8
VDDx UVLO Rising Threshold VVDD_ON 7.7 8.5 8.9 V 8-V UVLO Option 8
VDDx UVLO Falling Threshold VVDD_OFF 7.2 7.9 8.4 V 8-V UVLO Option 8
VDDx UVLO Threshold Hysteresis VVDD_HYS 0.6 V 8-V UVLO Option 8
VDDx UVLO ON Delay tVDD+ to OUT 10 µs 8
VDDx UVLO OFF Delay tVDD- to OUT 0.1 0.5 2 µs 8
VDDx UVLO Deglitch Filter tVDDFIL 0.1 0.17 µs 8
Input High Threshold Voltage VINx_H, VDIS_H 2 2.3 V 8
Input Low Threshold Voltage VINx_L, VDIS_L 0.8 1 V 8
Input Threshold Hysteresis VINx_HYS, VDIS_HYS 1 V 8
INx Pin Pull Down Resistance RINxD 50 90 185 kΩ INx = 3.3V 8
DIS Pin Pull Up Resistance RDISD 50 90 185 kΩ DIS= 3.3V 8
Peak Output Source Current IO+ -4 A CVDDx = 10 µF, CL = 0.22 µF, f = 1 kHz 8
Peak Output Sink Current IO- 6 A CVDDx = 10 µF, CL = 0.22 µF, f = 1 kHz 8
Pull up resistance ROH 5 Ω IOUTx = -0.05A 9
Pull down resistance ROL 0.55 Ω IOUTx = 0.05A 9
Output Active Pull Down on OUTx VOUTPD 1.6 2 V IOUT = 200mA, VDDx floating and unpowered. 9
Deadtime Programming for RDT≤0.15kΩ DTS -6 0.2 6 ns RDT=0~0.15kΩ 9
Dead time DT 86 99 112 ns RDT = 10 kΩ 9
Dead time DT 167 185 203 ns RDT = 20 kΩ 9
Dead time DT 399 443 487 ns RDT = 50 kΩ 9
Propagation Delay, Low to High tPDLH 26 33 45 ns Input Pulse Width = 100ns, 500kHz, measure with Input VIH to output 10% 9
Propagation Delay, High to Low tPDHL 26 33 45 ns Input Pulse Width = 100ns, 500kHz, measure with Input VIL to output 90% 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Increasing the PCB copper connecting to VDDA, VDDB, VSSA and VSSB pins is recommended, with priority 37

CAD (KiCad official)

  • Symbol: UCC21330BQDRQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: ucc21330bqdrq1-etched.step / ucc21330bqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc21330bqdrq1.step / ucc21330bqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TI(德州仪器) datasheet (48 pp, sha256 727e74046467fb2a, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF