# UCC21222QDRQ1

**Texas Instruments** · Isolators - Gate Drivers · SOIC-16

UCC21222QDRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INA | input | Input signal for channel A with a TTL/CMOS compatible threshold, pulled low internally if left open, so tie to ground when unused for better noise immunity. |
| 2 | INB | input | Input signal for channel B with a TTL/CMOS compatible threshold, pulled low internally if left open, so tie to ground when unused for better noise immunity. |
| 3 | VCCI | power_in | Primary-side supply voltage that should be locally decoupled to GND with a low ESR/ESL capacitor placed as close to the device as possible. |
| 4 | GND | power_in | Primary-side ground reference to which all primary-side signals are referenced. |
| 5 | DIS | input | Disables both driver outputs when asserted high and enables them when low; it is pulled high internally if floating, so tie to ground if unused, and an RC filter (R = 0 Ω to 100 Ω, C = 100 pF to 1000 pF) is recommended when driven from a microcontroller. |
| 6 | DT | input | Dead-time setting pin: a 1.7 kΩ to 100 kΩ resistor from DT to GND sets the minimum dead time, floating or shorting DT to VCCI disables the dead-time interlock (outputs may overlap), and a 0 Ω to 150 Ω resistor or a short to GND interlocks the two outputs. |
| 7 | NC | unconnected | No internal connection. |
| 8 | VCCI | power_in | Internally shorted to pin 3 and serves as the same primary-side supply pin. |
| 9 | VSSB | power_in | Ground for the secondary-side driver B and the ground reference for the secondary-side channel B. |
| 10 | OUTB | output | Output of driver B, connected to the gate of the channel B FET or IGBT. |
| 11 | VDDB | power_in | Secondary-side power supply for driver B, locally decoupled to VSSB with a low ESR/ESL capacitor placed as close to the device as possible. |
| 12 | NC | unconnected | No internal connection. |
| 13 | NC | unconnected | No internal connection. |
| 14 | VSSA | power_in | Ground for the secondary-side driver A and the ground reference for the secondary-side channel A. |
| 15 | OUTA | output | Output of driver A, connected to the gate of the channel A FET or IGBT. |
| 16 | VDDA | power_in | Secondary-side power supply for driver A, locally decoupled to VSSA with a low ESR/ESL capacitor placed as close to the device as possible. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `UCC21222QDRQ1`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `ucc21222qdrq1-etched.step` / `ucc21222qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc21222qdrq1.step` / `ucc21222qdrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc21222-q1) (46 pp, sha256 `bccaaa0eebbf09d7`, retrieved 2026-10-12, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc21222qdrq1-datasheet.pdf)