UC3854BN

Texas Instruments · AC-DC Controllers And Regulators · PDIP-16

UC3854BN from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	All bypass and timing capacitors connected to GND should have leads as short and direct as possible, and all voltages are measured with respect to GND.
2	PKLMT	input	The peak limit threshold is 0.0 V, so this pin connects to the negative voltage on the current sense resistor, with a resistor to REF used to offset that signal up to GND.
3	CAO	output	Output of the wide-bandwidth current amplifier, which commands the PWM to force the correct input current and can swing from 0.1 V to 7.5 V.
4	ISENSE	input	Inverting input of the current amplifier for switch current sensing; it remains functional down to and below GND but should not be taken below -0.5 V because it is diode-protected to GND.
5	MOUT	bidirectional	Multiplier output and non-inverting current amplifier input, which should not be taken below -0.5 V and must satisfy IMOUT ≤ 2 × IAC.
6	IAC	input	Current input to the multiplier proportional to instantaneous line voltage, where the maximum current at high line should be limited to 250 µA for best performance.
7	VAO	input	Voltage amplifier output that forms the third input to the multiplier and is internally clamped to 6.0 V.
8	VRMS	input	Input providing the RMS voltage to the multiplier, with a linear operating range of 0 V to 5.5 V and a divider that should produce 1.5 V at low line (85 VAC).
9	VREF	power_out	Internal reference used to set the peak limit point and for various device functions, which must be present for the device to operate.
10	ENA	input	Enable input where a nominal voltage above 2.65 V allows operation and the device shuts off below 2.15 V nominal; the pin is internally clamped to approximately 10 V.
11	VSENSE	input	Feedback input from the output that goes into the voltage error amplifier, whose output is another input to the multiplier.
12	RSET	input	A resistor from RSET to ground programs the oscillator charging current and the multiplier limit.
13	SS	input	Soft-start pin that is pulled up to over 3 V by an internal 14 µA source when VCC is valid and the device is enabled, and quickly discharges to ground on disable or supply dropout.
14	CT	input	A capacitor from CT to GND sets the PWM oscillator frequency.
15	VCC	power_in	Positive supply rail for the device.
16	GTDRV	output	PWM output as a 1.5-A peak totem-pole MOSFET gate driver, where a series gate resistor of at least 5 Ω should be used to limit overshoot.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-16
Category	Power Management (PMIC)
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply current, off			250	400	µA	CAO = 0 V, VAO = 0 V, VCC = VUVLO-0.3 V	4
Supply current, on			12	18	mA		4
VCC turn-on threshold voltage (UCx854B)		8	10.5	11.2	V		4
VCC turn-off threshold voltage (UCx854B)		7.8	10.3	11	V		4
VCC hysteresis (UCx854B)		0.1	0.22	0.5	V		4
VCC clamp		18	20	22	V	IVCC = IVCC(on) + 5 mA	4
Input voltage (voltage amplifier reference)		2.9	3	3.1	V		4
VSENSE bias current		-500	-25	500	nA		4
Open loop gain (voltage amplifier)		70	100		dB	2 V ≤ VOUT ≤ 5 V	4
High-level output voltage (voltage amplifier)	VOH	6			V	ILOAD = -500 µA	4
Low-level output voltage (voltage amplifier)	VOL		0.3	0.5	V	ILOAD = 500 µA	4
Output short-circuit current (voltage amplifier)	ISC	1.5		3.5	mA	VOUT = 0 V	4
Input offset voltage (current amplifier), TA = 25°C		-4		0	mV	VCM = 0 V, TA = 25°C	4
Input offset voltage (current amplifier), overtemperature		-5.5		0	mV	VCM = 0 V, Overtemperature	4
ISENSE input bias current		-500		500	nA	VCM = 0 V	4
Open loop gain (current amplifier)		80	110		dB	2 V ≤ VOUT = 6 V	4
High-level output voltage (current amplifier)	VOH	8			V	ILOAD = -500 µA	4
Low-level output voltage (current amplifier)	VOL		0.3	0.5	V	ILOAD = 500 µA	4
Output short-circuit current (current amplifier)	ISC	1.5		3.5	mA	VOUT = 0 V	4
Common mode rejection range	CMRR	-0.3		5	V		4
Gain bandwidth product (current amplifier)		3	5		MHz	fIN = 100 kHz, 10 mVp-p	4
Reference output voltage, TA = 25°C		7.4	7.5	7.6	V	IREF = 0 mA, TA = 25°C	4
Reference output voltage		7.35	7.5	7.65	V	IREF = 0 mA	4
Load regulation		0	8	20	mV	1 mA ≤ IREF ≤ 10 mA	4
Line regulation		0	14	25	mV	12 V ≤ VCC ≤ 18 V	4
Short circuit current (reference)	ISC	25	35	60	mA	VREF = 0 V	4
Initial accuracy (oscillator frequency)		85	100	115	kHz	TA = 25°C	5
Voltage stability (oscillator)				1	%	12 V ≤ VCC ≤ 18 V	5
Total variation (oscillator frequency)		80		120	kHz	Line, temperature	5
Ramp amplitude (peak-to-peak)		4.9		5.9	V		5
Ramp valley voltage		0.8		1.3	V		5
Enable threshold voltage		2.35	2.55	2.8	V		5
Enable hysteresis		500		600	mV	VFAULT = 2.5 V	5
Enable input bias current		-5		-2	µA	VENA = 0 V	5
Soft-start charge current		10	14	24	µA	VSS = 2.5 V	5
Peak limit offset voltage		-15		15	mV		5
Peak limit offset current		-200		-100	µA	VPKLMIT = -0.1 V	5
Output current, IA limited		-220	-200	-170	µA	IAC = 100 µA, VRMS = 1 V, RSET = 10 kΩ	5
Output current, zero		-2	-0.2	2	µA	IAC = 0 µA, RSET = 10 kΩ	5
Output current, power limited		-230	-200	-170	µA	VRMS = 1.5 V, Va = 6 V	5
Gain constant		-1.1	-1	-0.9	A/A	VRMS = 1.5 V, Va = 6 V, TA = 25°C	5
High-level output voltage (gate driver)	VOH	12	12.8		V	IOUT = -200 mA, VCC = 15 V	5
Low-level output voltage (gate driver)	VOL		1	2.2	V	IOUT = 200 mA	5
Low-level output voltage (gate driver)	VOL		300	500	mV	IOUT = 10 mA	5
Low-level UVLO voltage (gate driver)			0.9	1.5	V	IOUT = 50 mA, VCC = 0 V	5
Supply voltage VCC	VCC	10		20	V		3
Operating junction temperature (UC3854X)	TJ	0		70	°C	UC3854X (UC3854B)	3
Supply voltage VCC	VCC			22	V		2
GTDRV gate current, continuous	IGTDRV			0.5	A	Continuous	2
GTDRV gate current, 50% duty cycle	IGTDRV			1.5	A	50% duty cycle	2
Input voltage (VSENSE, VRMS, ISENSE, MOUT)				11	V		2
Input voltage (PKLMT)				5	V		2
Input current (RSET, IAC, PKLMT, ENA)				10	mA		2
Power dissipation				1	W		2
Junction temperature	TJ	-55		150	°C		2
Storage temperature	Tstg	-65		150	°C		2
Lead temperature (1,6 mm from case, 10 s)	Tsol			300	°C	1,6 mm (1/16 inch) from case for 10 seconds	2
Junction-to-case thermal resistance (PDIP-16)	θJC		45		°C/W	PDIP-16 (N)	3
Junction-to-ambient thermal resistance (PDIP-16)	θJA		90		°C/W	PDIP-16 (N), five square inch FR4 board	3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	copper		14,400 square mils use the following values, dual-in-line, 11°C/W; flat pack and pin grid array, 10°C/W.are at the end of each trace. (2) θJA (junction-to-ambient) applies to devices mounted to five s	3

CAD (KiCad official)

Symbol: UC3854BN
Footprint: Package_DIP:DIP-16_W7.62mm
3D model: PDIP-16 (KiCad packages3D, STEP)
3D model files: uc3854bn-etched.step / uc3854bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3854bn.step / uc3854bn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (29 pp, sha256 20dbe220bdb2dfe8, retrieved 2026-10-16, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# UC3854BN

**Texas Instruments** · AC-DC Controllers And Regulators · PDIP-16

UC3854BN from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | All bypass and timing capacitors connected to GND should have leads as short and direct as possible, and all voltages are measured with respect to GND. |
| 2 | PKLMT | input | The peak limit threshold is 0.0 V, so this pin connects to the negative voltage on the current sense resistor, with a resistor to REF used to offset that signal up to GND. |
| 3 | CAO | output | Output of the wide-bandwidth current amplifier, which commands the PWM to force the correct input current and can swing from 0.1 V to 7.5 V. |
| 4 | ISENSE | input | Inverting input of the current amplifier for switch current sensing; it remains functional down to and below GND but should not be taken below -0.5 V because it is diode-protected to GND. |
| 5 | MOUT | bidirectional | Multiplier output and non-inverting current amplifier input, which should not be taken below -0.5 V and must satisfy IMOUT ≤ 2 × IAC. |
| 6 | IAC | input | Current input to the multiplier proportional to instantaneous line voltage, where the maximum current at high line should be limited to 250 µA for best performance. |
| 7 | VAO | input | Voltage amplifier output that forms the third input to the multiplier and is internally clamped to 6.0 V. |
| 8 | VRMS | input | Input providing the RMS voltage to the multiplier, with a linear operating range of 0 V to 5.5 V and a divider that should produce 1.5 V at low line (85 VAC). |
| 9 | VREF | power_out | Internal reference used to set the peak limit point and for various device functions, which must be present for the device to operate. |
| 10 | ENA | input | Enable input where a nominal voltage above 2.65 V allows operation and the device shuts off below 2.15 V nominal; the pin is internally clamped to approximately 10 V. |
| 11 | VSENSE | input | Feedback input from the output that goes into the voltage error amplifier, whose output is another input to the multiplier. |
| 12 | RSET | input | A resistor from RSET to ground programs the oscillator charging current and the multiplier limit. |
| 13 | SS | input | Soft-start pin that is pulled up to over 3 V by an internal 14 µA source when VCC is valid and the device is enabled, and quickly discharges to ground on disable or supply dropout. |
| 14 | CT | input | A capacitor from CT to GND sets the PWM oscillator frequency. |
| 15 | VCC | power_in | Positive supply rail for the device. |
| 16 | GTDRV | output | PWM output as a 1.5-A peak totem-pole MOSFET gate driver, where a series gate resistor of at least 5 Ω should be used to limit overshoot. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply current, off |  |  | 250 | 400 | µA | CAO = 0 V, VAO = 0 V, VCC = VUVLO-0.3 V | 4 |
| Supply current, on |  |  | 12 | 18 | mA |  | 4 |
| VCC turn-on threshold voltage (UCx854B) |  | 8 | 10.5 | 11.2 | V |  | 4 |
| VCC turn-off threshold voltage (UCx854B) |  | 7.8 | 10.3 | 11 | V |  | 4 |
| VCC hysteresis (UCx854B) |  | 0.1 | 0.22 | 0.5 | V |  | 4 |
| VCC clamp |  | 18 | 20 | 22 | V | IVCC = IVCC(on) + 5 mA | 4 |
| Input voltage (voltage amplifier reference) |  | 2.9 | 3 | 3.1 | V |  | 4 |
| VSENSE bias current |  | -500 | -25 | 500 | nA |  | 4 |
| Open loop gain (voltage amplifier) |  | 70 | 100 |  | dB | 2 V ≤ VOUT ≤ 5 V | 4 |
| High-level output voltage (voltage amplifier) | VOH | 6 |  |  | V | ILOAD = -500 µA | 4 |
| Low-level output voltage (voltage amplifier) | VOL |  | 0.3 | 0.5 | V | ILOAD = 500 µA | 4 |
| Output short-circuit current (voltage amplifier) | ISC | 1.5 |  | 3.5 | mA | VOUT = 0 V | 4 |
| Input offset voltage (current amplifier), TA = 25°C |  | -4 |  | 0 | mV | VCM = 0 V, TA = 25°C | 4 |
| Input offset voltage (current amplifier), overtemperature |  | -5.5 |  | 0 | mV | VCM = 0 V, Overtemperature | 4 |
| ISENSE input bias current |  | -500 |  | 500 | nA | VCM = 0 V | 4 |
| Open loop gain (current amplifier) |  | 80 | 110 |  | dB | 2 V ≤ VOUT = 6 V | 4 |
| High-level output voltage (current amplifier) | VOH | 8 |  |  | V | ILOAD = -500 µA | 4 |
| Low-level output voltage (current amplifier) | VOL |  | 0.3 | 0.5 | V | ILOAD = 500 µA | 4 |
| Output short-circuit current (current amplifier) | ISC | 1.5 |  | 3.5 | mA | VOUT = 0 V | 4 |
| Common mode rejection range | CMRR | -0.3 |  | 5 | V |  | 4 |
| Gain bandwidth product (current amplifier) |  | 3 | 5 |  | MHz | fIN = 100 kHz, 10 mVp-p | 4 |
| Reference output voltage, TA = 25°C |  | 7.4 | 7.5 | 7.6 | V | IREF = 0 mA, TA = 25°C | 4 |
| Reference output voltage |  | 7.35 | 7.5 | 7.65 | V | IREF = 0 mA | 4 |
| Load regulation |  | 0 | 8 | 20 | mV | 1 mA ≤ IREF ≤ 10 mA | 4 |
| Line regulation |  | 0 | 14 | 25 | mV | 12 V ≤ VCC ≤ 18 V | 4 |
| Short circuit current (reference) | ISC | 25 | 35 | 60 | mA | VREF = 0 V | 4 |
| Initial accuracy (oscillator frequency) |  | 85 | 100 | 115 | kHz | TA = 25°C | 5 |
| Voltage stability (oscillator) |  |  |  | 1 | % | 12 V ≤ VCC ≤ 18 V | 5 |
| Total variation (oscillator frequency) |  | 80 |  | 120 | kHz | Line, temperature | 5 |
| Ramp amplitude (peak-to-peak) |  | 4.9 |  | 5.9 | V |  | 5 |
| Ramp valley voltage |  | 0.8 |  | 1.3 | V |  | 5 |
| Enable threshold voltage |  | 2.35 | 2.55 | 2.8 | V |  | 5 |
| Enable hysteresis |  | 500 |  | 600 | mV | VFAULT = 2.5 V | 5 |
| Enable input bias current |  | -5 |  | -2 | µA | VENA = 0 V | 5 |
| Soft-start charge current |  | 10 | 14 | 24 | µA | VSS = 2.5 V | 5 |
| Peak limit offset voltage |  | -15 |  | 15 | mV |  | 5 |
| Peak limit offset current |  | -200 |  | -100 | µA | VPKLMIT = -0.1 V | 5 |
| Output current, IA limited |  | -220 | -200 | -170 | µA | IAC = 100 µA, VRMS = 1 V, RSET = 10 kΩ | 5 |
| Output current, zero |  | -2 | -0.2 | 2 | µA | IAC = 0 µA, RSET = 10 kΩ | 5 |
| Output current, power limited |  | -230 | -200 | -170 | µA | VRMS = 1.5 V, Va = 6 V | 5 |
| Gain constant |  | -1.1 | -1 | -0.9 | A/A | VRMS = 1.5 V, Va = 6 V, TA = 25°C | 5 |
| High-level output voltage (gate driver) | VOH | 12 | 12.8 |  | V | IOUT = -200 mA, VCC = 15 V | 5 |
| Low-level output voltage (gate driver) | VOL |  | 1 | 2.2 | V | IOUT = 200 mA | 5 |
| Low-level output voltage (gate driver) | VOL |  | 300 | 500 | mV | IOUT = 10 mA | 5 |
| Low-level UVLO voltage (gate driver) |  |  | 0.9 | 1.5 | V | IOUT = 50 mA, VCC = 0 V | 5 |
| Supply voltage VCC | VCC | 10 |  | 20 | V |  | 3 |
| Operating junction temperature (UC3854X) | TJ | 0 |  | 70 | °C | UC3854X (UC3854B) | 3 |
| Supply voltage VCC | VCC |  |  | 22 | V |  | 2 |
| GTDRV gate current, continuous | IGTDRV |  |  | 0.5 | A | Continuous | 2 |
| GTDRV gate current, 50% duty cycle | IGTDRV |  |  | 1.5 | A | 50% duty cycle | 2 |
| Input voltage (VSENSE, VRMS, ISENSE, MOUT) |  |  |  | 11 | V |  | 2 |
| Input voltage (PKLMT) |  |  |  | 5 | V |  | 2 |
| Input current (RSET, IAC, PKLMT, ENA) |  |  |  | 10 | mA |  | 2 |
| Power dissipation |  |  |  | 1 | W |  | 2 |
| Junction temperature | TJ | -55 |  | 150 | °C |  | 2 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 2 |
| Lead temperature (1,6 mm from case, 10 s) | Tsol |  |  | 300 | °C | 1,6 mm (1/16 inch) from case for 10 seconds | 2 |
| Junction-to-case thermal resistance (PDIP-16) | θJC |  | 45 |  | °C/W | PDIP-16 (N) | 3 |
| Junction-to-ambient thermal resistance (PDIP-16) | θJA |  | 90 |  | °C/W | PDIP-16 (N), five square inch FR4 board | 3 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | 14,400 square mils use the following values, dual-in-line, 11°C/W; flat pack and pin grid array, 10°C/W.are at the end of each trace. (2) θJA (junction-to-ambient) applies to devices mounted to five s | 3 |

## CAD (KiCad official)

- Symbol: `UC3854BN`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: PDIP-16 (KiCad packages3D, STEP)
- 3D model files: `uc3854bn-etched.step` / `uc3854bn-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc3854bn.step` / `uc3854bn.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/uc3854a) (29 pp, sha256 `20dbe220bdb2dfe8`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uc3854bn-datasheet.pdf)