# UC3844D

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-14

UC3844D from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier compensation pin connected to external compensation elements to modify error amplifier output; features internal current limiting and can be forced to GROUND for zero duty cycle control. |
| 2 | NC | unconnected | Not connected. |
| 3 | VFB | input | Inverting input to internal error amplifier for voltage feedback control; typical 2.5V setpoint with maximum 2.55V input range. |
| 4 | NC | unconnected | Not connected. |
| 5 | ISENSE | input | Current sensing input connected to current sensing resistor; PWM comparator uses this signal to terminate OUTPUT switch conduction with maximum 1V peak input and 3V/V gain. |
| 6 | NC | unconnected | Not connected. |
| 7 | RT/CT | bidirectional | Fixed frequency oscillator timing pin where timing resistor RRT connects to VREF and timing capacitor CCT connects to GROUND; frequency set by formula fOSC = 1.72/(RRT×CCT) with maximum 500kHz operation. |
| 8 | PWRGND | power_in | Power ground return path providing ground reference for output gate driver stage. |
| 9 | GROUND | power_in | Analog signal ground providing signal return path; serves as both power and analog ground where PWRGND is absent. |
| 10 | OUTPUT | output | Gate driver output providing and sinking peak current up to 1A for direct MOSFET gate drive; actively held low when VCC is below turn-on threshold. |
| 11 | VC | power_in | Bias power supply input for output gate driver stage; requires bypass capacitor at least 10 times larger than main switch FET gate capacitance. |
| 12 | VCC | power_in | Power supply input operating from 12V to 28V with internal 34V clamp (30V absolute maximum from low impedance source); requires 0.1µF bypass capacitor to GROUND and additional bypass capacitor 10 times main switch FET gate capacitance. |
| 13 | NC | unconnected | Not connected. |
| 14 | VREF | power_in | 5V reference voltage output with ±2% accuracy providing error amplifier bias and oscillator charge current source up to ±20mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `UC3844D`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `uc3844d-etched.step` / `uc3844d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc3844d.step` / `uc3844d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/uc3842) (61 pp, sha256 `0f875fd24cbb5fda`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uc3844d-datasheet.pdf)