# UC3844BNG-TUDI

**Tudi** · AC-DC Controllers And Regulators · DIP-8

UC3844BNG-TUDI from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output for loop compensation; error amp sinks 2 mA min (7 mA typ) and sources 0.5 mA min (1.0 mA typ). |
| 2 | VFB | input | Error amplifier inverting input (feedback) with a 2.5 V typical input threshold; analog input limited to -0.3 to 5.5 V. |
| 3 | ISENSE | input | Current sense comparator input with 1.0 V typical maximum input signal; analog input limited to -0.3 to 5.5 V. |
| 4 | RT/CT | passive | Oscillator timing pin for external RT and CT, setting frequency (52 kHz typical at RT=10 kΩ, CT=3.3 nF) up to 500 kHz. |
| 5 | GND | power_in | Ground and power ground return for the IC and the output stage. |
| 6 | OUT | output | High-current totem-pole output driving a power MOSFET gate, rated for ±1 A output current. |
| 7 | VCC | power_in | Positive supply with undervoltage lockout (16 V on / 10 V off for UC3844), with an internal 30 V min zener clamp. |
| 8 | VREF | power_out | 5.0 V reference output (4.9 to 5.1 V) with 1 mA to 20 mA load range and -100 mA minimum short-circuit current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Output Voltage | VREF | 4.9 | 5 | 5.1 | V | TJ = 25°C, IREF = 1 mA | 3 |
| Line Regulation | ΔVREF |  | 6 | 20 | mV | 12V ≤ VCC ≤ 25 V | 3 |
| Load Regulation | ΔVREF |  | 6 | 25 |  | 1 mA ≤ IREF ≤ 20mA | 3 |
| Short Circuit Output Current | ISC | -100 | -180 |  | mA | TA = 25°C | 3 |
| Oscillation Frequency | f | 47 | 52 | 57 | KHz | TJ = 25°C | 3 |
| Frequency Change with Voltage | Δf/ΔVCC |  | 0.05 | 1 | % | 12V ≤ VCC ≤ 25 V | 3 |
| Oscillator Amplitude (peak to peak) | V(OSC) |  | 1.6 |  | V |  | 3 |
| Error Amp Input Bias Current | IBIAS |  | -0.1 | -2 | µA | VFB = 3V | 3 |
| Error Amp Input Voltage | VI(E.A) | 2.42 | 2.5 | 2.58 | V | Vpin1 = 2.5V | 3 |
| Error Amp Open Loop Voltage Gain | AVOL | 65 | 90 |  | dB | 2V ≤ V0 ≤ 4V | 3 |
| Unity Gain Bandwidth | UGBW | 0.5 | 0.6 |  | MHz | Tj = 25°C, Note 3 | 3 |
| Power Supply Rejection Ratio | PSRR | 60 | 70 |  | dB | 12V ≤ VCC ≤ 25 V | 3 |
| Error Amp Output Sink Current | ISINK | 2 | 7 |  | mA | Vpin2 = 2.7V, Vpin1 = 1.1V | 3 |
| Error Amp Output Source Current | ISOURCE |  | -0.5 | -1 | mA | Vpin2 = 2.3V, Vpin1 = 5V | 3 |
| Error Amp High Output Voltage | VOH | 5 | 6 |  | V | Vpin2 = 2.3V, RL = 15KΩ to GND | 3 |
| Error Amp Low Output Voltage | VOL | 0.8 | 1.1 |  | V | Vpin2 = 2.7V, RL = 15KΩ to PIN 8 | 3 |
| Current Sense Gain | GV | 2.85 | 3 | 3.15 | V/V | Note 1 & 2 | 3 |
| Maximum Input Signal | VI(MAX) | 0.9 | 1 | 1.1 | V | Vpin1 = 5V (Note 1) | 3 |
| Supply Voltage Rejection | SVR |  | 70 |  | dB | 12V ≤ VCC ≤ 25 V (Note 1) | 3 |
| Current Sense Input Bias Current | IBIAS |  | -3 | -10 | µA | Vpin3 = 3V | 3 |
| Output Low Voltage | VOL |  | 0.08 | 0.4 | V | ISINK = 20 mA | 3 |
| Output Low Voltage | VOL |  | 1.4 | 2.2 | V | ISINK = 200 mA | 3 |
| Output High Voltage | VOH | 13 | 13.5 |  | V | ISINK = 20 mA | 3 |
| Output High Voltage | VOH | 12 | 13 |  | V | ISINK = 200 mA | 3 |
| Rise Time | tR |  | 45 | 150 | nS | TJ = 25°C, CL = 1nF (Note 3) | 3 |
| Fall Time | tF |  | 35 | 150 | nS | TJ = 25°C, CL = 1nF (Note 3) | 3 |
| Undervoltage Lockout Start Threshold (UC3844) | VTH(ST) | 14.5 | 16 | 17.5 | V | UC2842/44, UC3842/44 | 3 |
| Undervoltage Lockout Minimum Operating Voltage after turn-on (UC3844) | VOPR(min) | 8.5 | 10 | 11.5 | V | UC2842/44, UC3842/44 (after turn on) | 3 |
| Maximum Duty Cycle (UC3844) | D(MAX) | 47 | 48 | 50 | % | UC2844/45, UC3844/45 | 3 |
| Minimum Duty Cycle | D(MAX) | 0 |  |  | % |  | 3 |
| Start-Up Current | IST |  | 0.17 | 0.3 | mA |  | 3 |
| Operating Supply Current | ICC (OPR) |  | 13 | 17 | mA | Vpin3 = Vpin2 = 0V | 3 |
| Zener Voltage | VZ | 30 |  | 38 | V | ICC = 25 mA | 3 |
| Supply Voltage (low impedance source) | VCC |  |  | 30 | V | Low impedance source | 3 |
| Output Current |  | -1 |  | 1 | A | ±1 A as printed | 3 |
| Input Voltage (Analog Inputs pins 2,3) | VI | -0.3 |  | 5.5 | V | Pins 2, 3 | 3 |
| Error Amp Output Sink Current | ISINK(E.A) |  |  | 10 | mA |  | 3 |
| Power Dissipation |  |  |  | 1 | W | TA = 25°C | 3 |
| Storage Temperature Range | Tstg | -65 |  | 150 | °C |  | 3 |
| Lead Temperature |  |  |  | 260 | °C | Soldering 5 sec | 3 |
| Operating Ambient Temperature (UC3842/43/44/45 family) | TA | 0 |  | 70 | °C | UC3842/43/44/45 characterized range | 1 |

## CAD (KiCad official)

- Symbol: `UC3844BNG-TUDI`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `uc3844bng-tudi-etched.step` / `uc3844bng-tudi-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc3844bng-tudi.step` / `uc3844bng-tudi.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Tudi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604436241534771200) (11 pp, sha256 `fa001136cdaccd5a`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uc3844bng-tudi-datasheet.pdf)