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UC3844BD

Public Made by Adom

by adom

lingxingic AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UC3844BD

lingxingic · AC-DC Controllers And Regulators · SOP-8

UC3844BD from lingxingic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output This pin is the Error Amplifier output and is made available for loop compensation; the datasheet gives an Error AMP output sink current maximum of 10 mA.
2 VFB input This is the inverting input of the Error Amplifier, normally connected to the switching power supply output through a resistor divider; the input bias current is -0.1 uA typical and -2 uA maximum at VFB = 5 V.
3 ISENSE input A voltage proportional to inductor current is connected to this input and the PWM uses it to terminate the output switch conduction; the maximum input signal is 0.9 to 1.1 V at VPIN1 = 5 V.
4 RT/CT passive The oscillator frequency and maximum output duty cycle are programmed by resistor RT connected to VREF and capacitor CT connected to ground, with operation to 500 kHz possible.
5 GROUND power_in This pin is the combined control circuitry and power ground.
6 OUTPUT output This output directly drives the gate of a power MOSFET, sourcing and sinking peak currents up to 1 A (output current rating ±1 A).
7 Vi power_in This pin is the positive supply of the control IC; the absolute maximum supply voltage (low impedance source) is 30 V.
8 VREF power_out This is the reference output, providing charging current for capacitor CT through resistor RT; the reference output voltage is 4.90 to 5.10 V at Io = 1 mA.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage (low impedance source) Vi 30 V 4
output current IO -1 1 A 4
power dissipation PD 1 W 4
error amplifier output sink current Isink(EA) 10 mA 4
analog inputs Vin(EA) -0.3 6.3 V 4
operating temperature Tamb -40 85 ℃ 4
storage temperature Tstg -65 150 ℃ 4
soldering temperature (SOP8) TL 250 ℃ 10s 4
reference output voltage VREF 4.9 5 5.1 V Io=1mA 4
line regulation 𝗈VREF 2 20 mV 12V≤Vi≤25V 4
load regulation 𝗈VREF 3 25 mV 1≤Io≤20mA 4
temperature drift of reference (row printed as 'short circuit output current') 𝗈VREF/𝗈T 0.2 mV/℃ 4
total output variation - line, load, temperature 4.82 5.18 V line, load, temperature 4
output short circuit current ISC -30 -100 -180 mA 4
oscillator frequency fOSC 49 52 55 kHz Tj=25℃ 4
oscillator frequency 48 56 kHz Tamb=Tlow to Thigh 4
oscillator frequency fOSC 225 250 275 kHz Tj=25℃ (RT=6.2kΩ, CT=1nF) 4
frequency change with voltage 𝗈fOSC /𝗈V 0.2 1 % Vi=12V~25V 4
discharge current Idischg 7.8 8.3 8.8 mA VOSC=2V; Tj=25℃, Tamb=-40 to 85℃ 4
input voltage V2 2.42 2.5 2.58 V VPIN1=2.5V 4
input bias current (error amplifier) Ib -0.1 -2 uA VFB=5V 4
open loop gain (name not printed) AVOL 65 90 dB 2V≤Vo≤4V 4
unity gain bandwidth BW 0.7 1 MHz Tj=25℃ 4
power supply rejection ratio PSRR 60 70 dB 12V≤Vi≤25V 5
output sink current IO 2 12 mA VPIN2=2.7V, VPIN1=1.1V 5
output source current IO -0.5 -1 mA VPIN2=2.3V, VPIN1=5V 5
VOUT High VOUT High 5 6.2 V VPIN2=2.3V; RL=15KΩ to ground 5
VOUT Low VOUT Low 0.8 1.1 V VPIN2=2.7V; RL=15KΩ to PIN 8 5
current sense gain GV 2.85 3 3.15 V/V 5
maximum input signal V3 0.9 1 1.1 V VPIN1=5V 5
supply voltage rejection SVR 70 dB 12V≤Vi≤25V 5
input bias current (current sense) Ib -2 -10 uA 5
delay to output 150 300 ns 5
output low level VOL 0.1 0.4 V Isink=20mA 5
output low level VOL 1.6 2.2 V Isink=200mA 5
output high level VOH 13 13.5 V Isource=20mA 5
output high level VOH 12 13.5 V Isource=200mA 5
UVLO saturation VOLS 0.1 1.1 V Vi=6V, ISINK=1mA 5
rise time tr 50 150 ns CL=1nF 5
fall time tf 50 150 ns CL=1nF 5
UVLO start threshold VTH(ST) 14.5 16 17.5 V UC3842/4 5
UVLO minimum operating voltage after turn-on VOPR(MIN) 8.5 10 11.5 V UC3842/4 5
maximum duty cycle 47 48 50 % UC3844/5 5
minimum duty cycle 0 % 5
start-up current Ist 0.3 0.5 mA Vi=14V, UC3842/4 5
operating supply current Ii 12 20 mA VPIN2=VPIN3=0V 5
zener voltage Viz 30 36 V Ii=25mA 5

CAD (KiCad official)

  • Symbol: UC3844BD
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: uc3844bd-etched.step / uc3844bd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3844bd.step / uc3844bd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (9 pp, sha256 b9bc470a5596c820, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF