UC3844AD8TR

Texas Instruments · AC-DC Controllers And Regulators · SOIC-8

UC3844AD8TR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	COMP	output	Low impedance 1MHz internal error amplifier output that also serves as the input to the peak current limit or PWM comparator with an open-loop gain (AVOL) of 80dB and a maximum sink current of 6mA.
2	FB	input	Input to the error amplifier used to control the power supply converter output voltage feedback loop for stability.
3	ISENSE	input	Input to the peak current limit or PWM comparator that controls the cycle-by-cycle peak current limit of the power system when used with a current sense resistor, with the maximum peak current sense signal internally clamped to 1V.
4	RT/CT	input	Input to the internal oscillator programmed using external timing resistor (RT) and timing capacitor (CT) with recommended values of 470pF to 4.7nF for capacitance and 5kΩ to 100kΩ for resistor.
5	GND	power_in	Controller signal ground.
6	OUTPUT	output	1A totem pole gate driver output that can pull in or sink up to 1A of gate driver current and requires a gate driver resistor to limit the current.
7	VCC	power_in	Gate driver bias input that must have a bias capacitor with capacitance at least 10 times larger than the main switch FET gate capacitance used in the design.
8	VREF	power_in	Reference voltage output for the PWM controller that must supply no more than 10mA of current in normal operation and is short-circuit protected at approximately 100mA, requiring a 1µF high-frequency bypass capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: UC3844AD8TR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: uc3844ad8tr-etched.step / uc3844ad8tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3844ad8tr.step / uc3844ad8tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (54 pp, sha256 1f5ad8805f414728, retrieved 2026-10-05, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# UC3844AD8TR

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UC3844AD8TR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Low impedance 1MHz internal error amplifier output that also serves as the input to the peak current limit or PWM comparator with an open-loop gain (AVOL) of 80dB and a maximum sink current of 6mA. |
| 2 | FB | input | Input to the error amplifier used to control the power supply converter output voltage feedback loop for stability. |
| 3 | ISENSE | input | Input to the peak current limit or PWM comparator that controls the cycle-by-cycle peak current limit of the power system when used with a current sense resistor, with the maximum peak current sense signal internally clamped to 1V. |
| 4 | RT/CT | input | Input to the internal oscillator programmed using external timing resistor (RT) and timing capacitor (CT) with recommended values of 470pF to 4.7nF for capacitance and 5kΩ to 100kΩ for resistor. |
| 5 | GND | power_in | Controller signal ground. |
| 6 | OUTPUT | output | 1A totem pole gate driver output that can pull in or sink up to 1A of gate driver current and requires a gate driver resistor to limit the current. |
| 7 | VCC | power_in | Gate driver bias input that must have a bias capacitor with capacitance at least 10 times larger than the main switch FET gate capacitance used in the design. |
| 8 | VREF | power_in | Reference voltage output for the PWM controller that must supply no more than 10mA of current in normal operation and is short-circuit protected at approximately 100mA, requiring a 1µF high-frequency bypass capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UC3844AD8TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `uc3844ad8tr-etched.step` / `uc3844ad8tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc3844ad8tr.step` / `uc3844ad8tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/uc3843a) (54 pp, sha256 `1f5ad8805f414728`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uc3844ad8tr-datasheet.pdf)