UC3843N from Texas Instruments, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	COMP	output	Error amplifier compensation pin for connecting external compensation components to modify the error amplifier output, and the error amplifier is internally current-limited so zero duty cycle can be commanded by externally forcing COMP to GROUND.
2	VFB	input	Inverting input to the internal error amplifier, used to control the power converter voltage-feedback loop for stability.
3	ISENSE	input	Primary-side current sense input connected to the current sensing resistor, used by the PWM to terminate OUTPUT switch conduction, with a typical current sense amplifier gain of 3 V/V.
4	RT/CT	bidirectional	Fixed-frequency oscillator set point with timing resistor RRT connected to VREF and timing capacitor CCT connected to GROUND, and timing resistor values must never be less than 5 kΩ.
5	GROUND	power_in	Analog and power ground return for the device, and TI recommends separating the signal return path from the high-current gate driver path.
6	OUTPUT	output	Gate drive output for directly driving an external MOSFET, sourcing and sinking peak currents of up to 1 A and actively held low when VCC is below the turnon threshold.
7	VCC	power_in	Analog controller bias supply input, with quiescent VCC current of 0.5 mA, a VCC clamp of 34 V typical, and an absolute maximum of 30 V from a low-impedance source.
8	VREF	power_out	5-V reference voltage output that requires a minimum 0.1-µF ceramic bypass capacitor to GROUND placed close to the pin, with an output short-circuit current of 30 mA.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-8
Category	Power Management (PMIC)
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Reference voltage	VREF	4.9	5	5.1	V	IVREF = 1 mA, TJ = 25°C, UC384x	7
Total output variation	VREF	4.82		5.18	V	Line, load, temperature, UC384x	7
Line regulation			6	20	mV	12 ≤ VCC ≤ 25 V	7
Load regulation			6	25	mV	1 ≤ IVREF ≤ 20 mA	7
Temperature stability			0.2	0.4	mV/°C	See (1) (3)	7
Output short circuit		-180	-100	-30	mA		7
Initial accuracy	fOSC	47	52	57	kHz	TJ = 25°C	7
Voltage stability			0.2	1	%	12 ≤ VCC ≤ 25 V	7
Temperature stability (oscillator)				5	%	TMIN ≤ TA ≤ TMAX	7
Error amplifier input voltage	VFB	2.42	2.5	2.58	V	VCOMP = 2.5 V, UC384x	7
Input bias current	IVFB			-2	µA	UC384x	7
Open-loop voltage gain	AVOL	65	90		dB	2 ≤ VCOMP ≤ 4 V	7
Unity gain bandwidth		0.7	1		MHz	TJ = 25°C	7
COMP sink current	I(snk)	2	6		mA	VFB = 2.7 V, VCOMP = 1.1 V	7
COMP source current	I(src)	-0.5	-0.8		mA	VFB = 2.3 V, VCOMP = 5 V	7
COMP high-level output voltage	VCOMP High	5	6		V	VFB = 2.3 V, RL = 15 kΩ COMP to GROUND	7
COMP low-level output voltage	VCOMP Low	0.7	1.1		V	VFB = 2.7 V, RL = 15 kΩ COMP to VREF	7
Current sense gain	ACS	2.85	3	3.15	V/V	See (4) (6)	8
Maximum input signal	VISENSE	0.9	1	1.1	V	VCOMP = 5 V	8
Input bias current	IISENSE	-10	-2		µA		8
Delay to output	tDLY	150	300		ns	VISENSE stepped from 0 V to 2 V	8
Low-level OUTPUT voltage	VOUT Low	0.1		0.4	V	ISINK = 20 mA	8
Low-level OUTPUT voltage	VOUT Low	1.5		2.2	V	ISINK = 200 mA	8
High-level OUTPUT voltage	VOUT High	13		13.5	V	ISOURCE = 20 mA	8
High-level OUTPUT voltage	VOUT High	12		13.5	V	ISOURCE = 200 mA	8
Rise time	tRISE	25		150	ns	COUTPUT = 1 nF, TJ = 25°C	8
Fall time	tFALL	25		150	ns	COUTPUT = 1 nF, TJ = 25°C	8
UVLO enable threshold	VCCON	7.8	8.4	9	V	UCx843/5	8
UVLO off threshold	VCCOFF	7	7.6	8.2	V	UCx843/5	8
Maximum duty cycle	DMAX	92	97	100	%	UCx842/3	8
Minimum duty cycle	DMIN		0		%		8
Start-up current	IVCC		0.5	1	mA		8
Operating supply current	IVCC		11	17	mA	VVFB = VISENSE = 0 V	8
VCC Zener voltage	VCC	30	39		V	IVCC = 25 mA	8
Supply voltage	VVCC	12		28	V	VCC and VC (1)	6
Input voltage	VVFB			2.5	V	VFB	6
Input voltage	VISENSE			1	V	ISENSE	6
Supply current, externally limited	IVCC			25	mA		6
Average output current	IOUTPUT			200	mA		6
Reference output current	IVREF	-20			mA		6
Oscillator frequency	fOSC	100		500	kHz		6
Operating free-air temperature	TA	0		70	°C	UC384x	6
Supply voltage (absolute)	VVCC			30	V	Low impedance source	6
Analog input voltage	VVFB, VISENSE	-0.3		6.3	V		6
Output drive current	IOUTPUT	-1		1	A		6
Error amplifier output sink current	ICOMP			10	mA		6
Output energy	EOUTPUT			5	µJ	Capacitive load	6
Junction temperature	TJ			150	°C		6
Storage temperature	Tstg	-65		150	°C		6
Junction-to-ambient thermal resistance	RθJA		74.1		°C/W	P (PDIP) 8 pins	6
Junction-to-case (top) thermal resistance	RθJC(top)		63.4		°C/W	P (PDIP) 8 pins	6
Junction-to-board thermal resistance	RθJB		50.5		°C/W	P (PDIP) 8 pins	6
Junction-to-top characterization parameter	ψJT		34.6		°C/W	P (PDIP) 8 pins	6
Junction-to-bottom characterization parameter	ψJB		49.2		°C/W	P (PDIP) 8 pins	6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	The inductor rising slope, Sn, at the ISENSE pin is calculated with Equation 40. Sn =	29

CAD (KiCad official)

Symbol: UC3843N
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: PDIP-8 (KiCad packages3D, STEP)
3D model files: uc3843n-etched.step / uc3843n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3843n.step / uc3843n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (63 pp, sha256 9452e59764ebb79a, retrieved 2026-11-06, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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UC3843N

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