component
UC3843DTR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownUC3843DTR
Texas Instruments · AC-DC Controllers And Regulators · SOIC-14
UC3843DTR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error-amplifier compensation pin; connect external compensation components here to shape the error-amplifier output, and the amplifier's internal current limit allows COMP to be forced externally to GROUND to command zero duty cycle. |
| 2 | NC | unconnected | No internal connection. |
| 3 | VFB | input | Inverting input of the internal error amplifier, used to close the power-converter voltage-feedback loop for regulation stability; keep lead length and stray capacitance minimal. |
| 4 | NC | unconnected | No internal connection. |
| 5 | ISENSE | input | Primary-side current-sense input connected to the current-sense resistor; the PWM comparator uses this signal to terminate the OUTPUT switch's on-time, and a voltage ramp can be applied here for voltage-mode operation or slope compensation. |
| 6 | NC | unconnected | No internal connection. |
| 7 | RT/CT | bidirectional | Fixed-frequency oscillator timing pin; connect timing resistor RRT from VREF to this pin and timing capacitor CCT from this pin to GROUND to set fOSC = 1.72/(RRT × CCT), with RRT never below 5kΩ. |
| 8 | PWRGND | power_in | Power ground pin, separate from analog GROUND on this 14-pin package, used as the return for the high-current gate-drive output stage. |
| 9 | GROUND | power_in | Analog signal/reference ground for the device; TI recommends keeping this signal return separate from the high-current gate-driver ground path. |
| 10 | OUTPUT | output | High-current bipolar totem-pole gate-drive output for an external N-channel MOSFET, capable of sourcing/sinking peak currents up to 1A and actively held low when VCC is below the UVLO turn-on threshold. |
| 11 | VC | power_in | Bias-supply input dedicated to the output gate driver stage; requires a bypass capacitor with capacitance at least 10x the main switching FET's gate capacitance. |
| 12 | VCC | power_in | Analog controller bias-supply input; total VCC current equals the quiescent current plus the average OUTPUT current (IOUTPUT = Qg × fSW), and requires a 0.1µF bypass capacitor to GROUND plus an additional capacitor at least 10x the switching FET gate capacitance. |
| 13 | NC | unconnected | No internal connection. |
| 14 | VREF | power_out | 5V internal reference output used to charge the oscillator timing capacitor through the timing resistor and to bias internal circuitry; requires a ceramic bypass capacitor of at least 0.1µF placed as close as possible to the pin, with additional bypass for any external load on VREF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
UC3843DTR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
uc3843dtr-etched.step/uc3843dtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc3843dtr.step/uc3843dtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
0f875fd24cbb5fda, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).