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UC3843AP

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UTC(Unisonic Tech) DC-DC Controllers, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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UC3843AP

UTC(Unisonic Tech) · DC-DC Controllers · DIP-8

UC3843AP from UTC(Unisonic Tech), in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Error amplifier output for loop compensation, which can source or sink up to 0.5mA, and pulling it below two diode drops above ground shuts down the output.
2 VFB input Error amplifier inverting input (feedback) regulated against the 2.5V internal reference, with analog input range -0.3 to +6.3V.
3 Current Sense input Current sense comparator input where peak current is ISMAX=1.0V/Rs, with analog input range -0.3 to +6.3V and raising it above 1V shuts down the output.
4 RT/CT passive Oscillator timing connection for the external RT and CT that set the frequency (52kHz typ. at RT=10kΩ, CT=3.3nF) with 1.7V peak-to-peak amplitude.
5 GND power_in Ground, where timing and bypass capacitors should be connected close to this pin in a single-point ground.
6 Output output Totem-pole output driving a MOSFET directly with ±1A peak current, high impedance during UVLO so it should be shunted to GND with a bleeder resistor.
7 VCC power_in Supply input with 30V absolute maximum from a low impedance source, UVLO start threshold 8.4V typ. and minimum operating voltage 7.6V typ. for the UC3843A.
8 VREF power_out Internal trimmed 5V reference output (4.9 to 5.1V at 1mA) with short-circuit current of -100mA typ.

Key specifications

Parameter Value
Manufacturer UTC(Unisonic Tech)
Package DIP-8
Category Power Supply Chip
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reference Output Voltage VREF 4.9 5 5.1 V TJ=25°C, IOUT=1mA 3
Reference Line Regulation VREF 6 20 mV 12≦VIN25V 3
Reference Load Regulation VREF 15 35 mV 1≦IOUT=20mA 3
Reference Temperature Stability 0.2 0.4 mV/°C Note 1 3
Total Output Variation 4.82 5.18 V Line, Load, Temp (Note 1) 3
Output Noise Voltage VOSC 50 μV 10Hz≦f≦10kHz, TJ=25°C (Note 1) 3
Long Term Stability 5 25 mV TA=25°C, 1000Hrs (Note 1) 3
Output Short Circuit ISC -30 -100 -180 mA 3
Oscillator Initial Accuracy f 47 52 57 kHz TJ=25°C 3
Oscillator Voltage Stability f/VCC 0.2 1 % 12≦VCC≦25V 3
Oscillator Temperature Stability 5 % TMIN≦TA≦TMAX (Note 1) 3
Oscillator Amplitude VOSC 1.7 V VPIN4 peak to peak 3
Error Amp Input Voltage VI(EA) 2.42 2.5 2.58 V VPIN1=2.5V 3
Error Amp Input Bias Current II(BIAS) -0.3 -2 A 3
Error Amp Open Loop Gain AVOL 60 90 dB 2V ≦VOUT≦4V 3
Error Amp Unity Gain Bandwidth 0.7 1 MHz TJ=25°C (Note 1) 3
Error Amp PSRR PSRR 60 70 dB I2≦VCC≦25V 3
Error Amp Output Sink Current IO(SINK) 2 6 mA VPIN2=2.7V,VPIN1=1.1V 3
Error Amp Output Source Current IO(SOURCE) -0.5 -0.8 mA VPIN2=2.3V,VPIN1=5V 3
Error Amp VOUT High VOH 5 6 V VPIN2=2.3V, RL=15kΩ to GND 3
Error Amp VOUT Low VOL 0.7 1.1 V VPIN2=2.7V,VPIN1=1.1V 3
Current Sense Gain GV 2.85 3 3.15 V/V Note 2, 3 4
Current Sense Maximum Input Signal VI(MAX) 0.9 1 1.1 V VPIN1=5V (Note 2) 4
Current Sense PSRR PSRR 70 dB 12V≦VCC≦25V 4
Current Sense Input Bias Current IBIAS -2 -10 A 4
Current Sense Delay to Output 150 300 ns VPIN3=0 to 2V 4
Output Low Level VOL 0.1 0.4 V IO(SINK)=20mA 4
Output Low Level VOL 1.5 2.2 V IO(SINK)=200mA 4
Output High Level VOH 13 13.5 V IO(SOURCE)=20mA 4
Output High Level VOH 12 13.5 V IO(SOURCE)=200mA 4
Output Rise Time tR 50 150 ns TJ=25°C, CL=1nF (Note 1) 4
Output Fall Time tF 50 150 ns TJ=25°C, CL=1nF (Note 1) 4
Start Threshold (3843A) VTH(ST) 7.8 8.4 9 V 4
Min. Operating Voltage (3843A) VOPR(MIN) 7 7.6 8.2 V After Turn On 4
Duty Cycle Max D(MAX) 95 97 100 % 4
Duty Cycle Min D(MIN) 0 % 4
Start-up Current IST 0.12 0.3 mA 4
Operating Supply Current ICC(OPR) 11 17 mA VPIN2=VPIN3=0V 4
VCC Zener Voltage Vz 34 V ICC=25mA 4
Supply Voltage (Low Impedance Source) VCC 30 V TA=25°C 3
Analog Inputs (Pin 2,3) VI(ANA) -0.3 6.3 V TA=25°C 3
Output Current (Peak) IO(PEAK) -1 1 A TA=25°C 3
Error Amplifier Output Sink Current ISINK(EA) 10 mA TA=25°C 3
Output Energy (Capacity Load) 5 μJ TA=25°C 3
Power Dissipation DIP-8 PD 1250 mW TA≦25°C 3
Power Dissipation Derating 8 mW/°C Derated at TA>25°C 3
Junction Temperature TJ 150 °C 3
Storage Temperature TSTG -65 150 °C 3
Operating Ambient Temperature TA 0 70 °C Electrical characteristics range 3

CAD (KiCad official)

  • Symbol: UC3843AP
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: uc3843ap-etched.step / uc3843ap-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3843ap.step / uc3843ap.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UTC(Unisonic Tech) datasheet (9 pp, sha256 742f0c9d18996ac5, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF