component
UC3842D
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC3842D
Texas Instruments · AC-DC Controllers And Regulators · SOIC-14
UC3842D from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier compensation pin for external compensation network; internal current limiting allows forcing to GROUND for zero duty cycle control. |
| 2 | NC | unconnected | No Connect. |
| 3 | VFB | input | Inverting input of internal error amplifier for voltage feedback loop control to achieve regulation stability. |
| 4 | NC | unconnected | No Connect. |
| 5 | ISENSE | input | Primary side current sensing input connected to current sensing resistor; PWM uses this signal to terminate OUTPUT conduction; voltage ramp can be applied for voltage mode control. |
| 6 | NC | unconnected | No Connect. |
| 7 | RT/CT | bidirectional | Oscillator timing point; connect timing resistor RRT from VREF and timing capacitor CCT to GROUND to program switching frequency fOSC = 1.72 / (RRT × CCT). |
| 8 | PWRGND | power_in | Power ground reference for output stage and gate driver circuitry. |
| 9 | GROUND | power_in | Analog ground for signal return paths; for packages without PWRGND serves as both power and analog ground. |
| 10 | OUTPUT | output | Gate driver output for direct MOSFET gate drive with peak current to 1A source and sink capability; actively held low when VCC is below UVLO on-threshold. |
| 11 | VC | power_in | Gate driver bias supply input requiring bypass capacitor at least 10 times larger than main switch FET gate capacitance. |
| 12 | VCC | power_in | Analog controller bias supply input with recommended operating range 12V to 28V; requires 0.1µF bypass capacitor directly to GROUND. |
| 13 | NC | unconnected | No Connect. |
| 14 | VREF | power_in | 5V reference voltage output (±2% tolerance) for oscillator timing capacitor charging and internal bias circuits; requires minimum 0.1µF ceramic bypass capacitor to GROUND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
UC3842D - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
uc3842d-etched.step/uc3842d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc3842d.step/uc3842d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
0f875fd24cbb5fda, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).