component
UC3825N
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC3825N
Texas Instruments · AC-DC Controllers And Regulators · DIP-16
UC3825N from Texas Instruments, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INV | input | Inverting input of the wide-bandwidth error amplifier; absolute maximum -0.3V to 7V. |
| 2 | NI | input | Non-inverting input of the wide-bandwidth error amplifier; absolute maximum -0.3V to 7V. |
| 3 | E/A Out | output | Error amplifier output, with output current limited to 5mA and Pin 3 zero duty cycle threshold of 1.1V to 1.25V. |
| 4 | Clock | output | Oscillator clock output, with output current limited to -5mA and clock high level of 3.9V to 4.5V. |
| 5 | RT | passive | Oscillator timing resistor connection that sets the charging current, with oscillator charging current limited to -5mA. |
| 6 | CT | passive | Oscillator timing capacitor connection, with analog input range -0.3V to 6V. |
| 7 | Ramp | input | Ramp input to the PWM comparator, with analog input range -0.3V to 7V and bias current of -1 to -5µA. |
| 8 | Soft Start | bidirectional | Soft-start pin that doubles as a maximum duty cycle clamp, with 9µA typical charge current and sink current limited to 20mA. |
| 9 | ILIM/SD | input | Current limit and shutdown input with 1.0V current limit threshold and 1.4V shutdown threshold, range -0.3V to 6V. |
| 10 | Gnd | power_in | Ground reference for all voltages; the datasheet states all voltages are with respect to this pin. |
| 11 | Out A | output | Totem pole output A sourcing or sinking 0.5A DC and 2.0A pulse (0.5µs). |
| 12 | Pwr Gnd | power_in | Power ground for the output stage. |
| 13 | Vc | power_in | Output stage collector supply, to be bypassed with 0.1µF ceramic capacitor, with maximum supply of 30V. |
| 14 | Out B | output | Totem pole output B sourcing or sinking 0.5A DC and 2.0A pulse (0.5µs). |
| 15 | VCC | power_in | Positive supply voltage, absolute maximum 30V, with UVLO start threshold of 9.2V typical and 0.8V hysteresis, bypass with 0.1µF. |
| 16 | VREF 5.1V | power_out | 5.1V reference output, 5.00V to 5.20V for UC3825 at 1mA, bypass with 0.1µF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
UC3825N - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
uc3825n-etched.step/uc3825n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc3825n.step/uc3825n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
62f4a96c2122b13d, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).