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UC3526ADWTR

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Texas Instruments DC-DC Converters, SOIC-18-300mil. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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UC3526ADWTR

Texas Instruments · DC-DC Converters · SOIC-18-300mil

UC3526ADWTR from Texas Instruments, in a SOIC-18-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +ERROR input Non-inverting input of the transconductance error amplifier, with common-mode voltage of +5.0V for positive supplies and analog input range -0.3V to +VIN.
2 -ERROR input Inverting input of the error amplifier, where the feedback divider connects, with analog input range -0.3V to +VIN.
3 COMP output Error amplifier output and compensation node (2MΩ output impedance) where shunt reactance to ground sets the loop gain/frequency response.
4 CSS passive Soft-start capacitor connection, charged by an internal 100µA current source (50 to 150µA) once RESET goes HIGH.
5 RESET bidirectional Active-low digital port held LOW by under-voltage lockout and discharging the soft-start capacitor when pulled LOW, TTL compatible with logic thresholds of +1.1V.
6 -CURRENT SENSE input Inverting input of the current limit comparator, with 100mV sense threshold and common-mode range of 0 to +12V.
7 +CURRENT SENSE input Non-inverting input of the current limit comparator, with 100mV sense threshold and common-mode range of 0 to +12V.
8 SHUTDOWN bidirectional Active-low digital port that immediately inhibits all PWM output pulses when pulled LOW, TTL compatible.
9 RTIMING passive Oscillator timing resistor connection (2kΩ to 150kΩ) that with CT and RD sets the oscillator frequency.
10 CT passive Oscillator timing capacitor connection (400pF to 20µF) that carries the sawtooth waveform used for pulse width modulation.
11 RD passive Deadtime resistor connection that sets output deadtime, increasing by 400ns/Ω at 40kHz, with RD = 0Ω when shorted to ground.
12 SYNC bidirectional Active-low oscillator synchronization port where a LOW pulse about 0.5µs wide locks the oscillator to an external clock, TTL compatible.
13 OUTPUT A output Totem-pole driver output A that sources and sinks 100mA continuously and 200mA peak.
14 VC power_in Collector supply for the output drivers, 4.5V to 35V recommended and 40V maximum, with capacitor decoupling recommended.
15 GROUND power_in Ground return for the device and output drivers, needing careful grounding to avoid transients from high peak sink currents.
16 OUTPUT B output Totem-pole driver output B that sources and sinks 100mA continuously and 200mA peak.
17 +VIN power_in Input supply voltage, 7V to 35V recommended operating and 40V maximum.
18 VREF power_out Precision 5.0V band-gap reference output providing 0 to 20mA of load current, 50mA maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-18-300mil
Category Power Management (PMIC)
Pins 18

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage (+VIN) +VIN 7 35 V Recommended operating conditions 2
Collector Supply Voltage (+VC) +VC 4.5 35 V Recommended operating conditions 2
Sink/Source Load Current (each output) 0 100 mA Each output 2
Reference Load Current 0 20 mA 2
Oscillator Frequency Range 1 600 Hz / kHz Min 1 Hz, max 600 kHz 2
Oscillator Timing Resistor (RT) RT 2 150 kΩ 2
Oscillator Timing Capacitor (CT) CT 400 20 pF / µF Min 400 pF, max 20 µF 2
Available Deadtime Range at 40kHz 1 50 % At 40kHz 2
Operating Ambient Temperature Range (UC3526A) TA 0 70 °C UC3526A 2
Input Voltage (+VIN) +VIN 40 V 2
Collector Supply Voltage (+VC) +VC 40 V 2
Logic Inputs -0.3 5.5 V 2
Analog Inputs -0.3 V Max printed as +VIN 2
Source/Sink Load Current (each output) 200 mA Each output 2
Reference Load Current 50 mA 2
Logic Sink Current 15 mA 2
Power Dissipation 1000 mW TA = +25°C (Note 2) 2
Power Dissipation 3000 mW TC = +25°C (Note 2) 2
Operating Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature 300 °C Soldering, 10 seconds 2
Output Voltage VREF 4.9 5 5.1 V TJ = +25°C 3
Line Regulation 2 15 mV +VIN = 7 to 35V 3
Load Regulation 5 20 mV IL = 0 to 20mA 3
Temperature Stability 15 50 mV Over operating TJ (Note 5) 3
Total Output Voltage Range VREF 4.85 5 5.15 V Over recommended operating conditions 3
Short Circuit Current 25 50 100 mA VREF = 0V 3
RESET Output Voltage 0.2 0.4 V VREF = 3.8V 3
RESET Output Voltage 2.4 4.8 V VREF = 4.7V 3
Initial Accuracy -8 3 8 % TJ = +25°C; printed ±8% max, ±3 typ 3
Voltage Stability 0.5 1 % +VIN = 7 to 35V 3
Temperature Stability 1 3 % Over operating TJ (Note 5) 3
Sawtooth Peak Voltage 3 3.5 V +VIN = 35V 3
Sawtooth Valley Voltage 0.5 1 V +VIN = 7V 3
Input Offset Voltage 2 10 mV RS ≤ 2kΩ 3
Input Bias Current -350 -2000 nA 3
Input Offset Current 35 200 nA 3
DC Open Loop Gain 60 72 dB RL ≥ 10MΩ 3
HIGH Output Voltage 3.6 4.2 V VPIN 1 - VPIN 2 ≥ 150mV, ISOURCE = 100µA 3
LOW Output Voltage 0.2 0.4 V VPIN 2 - VPIN 1 ≥ 150mV, ISINK = 100µA 3
Common Mode Rejection 70 94 dB RS ≤ 2kΩ 3
Supply Voltage Rejection 66 80 dB +VIN = 12 to 18V 3
Maximum Duty Cycle 45 49 % VCOMPENSATION = +3.6V 3
HIGH Output Voltage (Digital Ports) 2.4 4 V ISOURCE = 40µA 3
LOW Output Voltage (Digital Ports) 0.2 0.4 V ISINK = 3.6mA 3
HIGH Input Current -125 -200 µA VIH = +2.4V 3
LOW Input Current -225 -360 µA VIL = +0.4V 3
Current Limit Sense Voltage 80 100 120 mV RS ≤ 50Ω 3
Current Limit Input Bias Current -3 -10 µA 3
Error Clamp Voltage 0.1 0.4 V RESET = +0.4V 4
CS Charging Current 50 100 150 µA RESET = +2.4V 4
HIGH Output Voltage (Output Driver) 12.5 13.5 V ISOURCE = 20mA 4
HIGH Output Voltage (Output Driver) 12 13 V ISOURCE = 100mA 4
LOW Output Voltage (Output Driver) 0.2 0.3 V ISINK = 20mA 4
LOW Output Voltage (Output Driver) 1.2 2 V ISINK = 100mA 4
Collector Leakage 50 150 µA VC = 40V 4
Rise Time 0.3 0.6 µs CL = 1000pF (Note 5) 4
Fall Time 0.1 0.2 µs CL = 1000pF (Note 5) 4
Standby Current 14 20 mA SHUTDOWN = +0.4V 4

CAD (KiCad official)

  • Symbol: UC3526ADWTR
  • Footprint: Package_SO:SOIC-18W_7.5x11.6mm_P1.27mm
  • 3D model: SOIC-18-300mil (KiCad packages3D, STEP)
  • 3D model files: uc3526adwtr-etched.step / uc3526adwtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc3526adwtr.step / uc3526adwtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (13 pp, sha256 8b0e91622f7fc0fd, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF