component
UC2856QDWRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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UC2856QDWRQ1
Texas Instruments · DC-DC Converters · SOIC-16-300mil
UC2856QDWRQ1 from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CL SS | input | Current-limit adjust and soft-start terminal; the current drawn into this pin determines whether the shutdown circuit latches or auto-restarts (Figure 7 and footnotes 5 and 6 of the electrical table). |
| 2 | VREF | power_out | 5.1-V reference output (5.05 V to 5.15 V at IO = 1 mA, TJ = 25°C); short-circuit current is -25 mA to -65 mA with VREF = 0 V. |
| 3 | CS− | input | Inverting input of the current-sense amplifier; input common-mode range is 0 V to 3 V. |
| 4 | CS+ | input | Non-inverting input of the current-sense amplifier; input common-mode range is 0 V to 3 V. |
| 5 | EA+ | input | Non-inverting input of the error amplifier; common-mode range is 0 V to VIN - 2 V. |
| 6 | EA− | input | Inverting input of the error amplifier; common-mode range is 0 V to VIN - 2 V. |
| 7 | COMP | output | Error amplifier output and compensation node; the error amplifier can source up to 0.5 mA. |
| 8 | CT | passive | Oscillator timing capacitor connection; the output deadtime is determined by the size of CT. |
| 9 | RT | passive | Oscillator timing resistor connection; oscillator frequency is set by RT and CT (characterized with RT = 10 kΩ and CT = 1 nF). |
| 10 | SYNC | bidirectional | TTL-compatible oscillator sync pin: as an output it provides VOH of 2.4 V minimum at -1 mA and VOL of 0.4 V maximum at 1 mA, and it is 3-stated when used as a sync input. |
| 11 | AOUT | output | Totem-pole output driver A; absolute maximum output current is 0.5 A DC or 2 A pulse (0.5 ms). |
| 12 | GND | power_in | Ground reference for all device voltages; all voltages are specified with respect to GND. |
| 13 | VC | power_in | Collector supply for the output stages; absolute maximum collector supply voltage is 40 V. |
| 14 | BOUT | output | Totem-pole output driver B; absolute maximum output current is 0.5 A DC or 2 A pulse (0.5 ms). |
| 15 | VIN | power_in | Supply voltage input; absolute maximum is 40 V, and the undervoltage lockout startup threshold is 8 V typical. |
| 16 | SHUTDOWN | input | Shutdown input with a 1.0 V threshold (0.95 V to 1.05 V) and an input voltage range of 0 V to 5 V; absolute maximum is -0.3 V to 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | 5.05 | 5.1 | 5.15 | V | IO = 1 mA, TJ = 25°C | 3 | |
| Line regulation voltage | 20 | mV | VIN = 8 V to 40 V | 3 | |||
| Load regulation voltage | 15 | mV | IO = –1 mA to –10 mA | 3 | |||
| Total output variation | 5 | 5.2 | V | Over line, load, and temperature | 3 | ||
| Output noise voltage | 50 | µV | f = 10 Hz to 10 kHz, TJ = 25°C | 3 | |||
| Long term stability | 5 | 25 | mV | 1000 hours, TJ = 25°C | 3 | ||
| Short circuit current | -25 | -45 | -65 | mA | VREF = 0 V | 3 | |
| Initial accuracy (oscillator frequency) | 180 | 200 | 220 | kHz | TJ = 25°C | 3 | |
| Initial accuracy (oscillator frequency, full range) | 170 | 230 | kHz | TJ = Full range | 3 | ||
| Voltage stability | 2 | % | VIN = 8 V to 40 V | 3 | |||
| Discharge current | 7.5 | 8 | 8.8 | mA | VCT = 2 V, TJ = 25°C | 3 | |
| Discharge current | 6.7 | 8 | 8.8 | mA | VCT = 2 V | 3 | |
| Sync output high level voltage | 2.4 | 3.6 | V | IO = –1 mA | 3 | ||
| Sync output low level voltage | 0.2 | 0.4 | V | IO = 1 mA | 3 | ||
| Sync input high level voltage | 2 | V | CT = 0 V, RT = VREF | 3 | |||
| Sync input low level voltage | 0.8 | V | CT = 0 V, RT = VREF | 3 | |||
| Sync input current | 1 | 10 | µA | CT = 0 V, RT = VREF, VSYNC = 5 V | 3 | ||
| Sync delay to outputs | 50 | 100 | ns | CT = 0 V RT = VREF, VSYNC = 0.8 V to 2 V | 3 | ||
| Input offset voltage (error amplifier) | 5 | mV | VCM = 2 V | 4 | |||
| Input bias current (error amplifier) | -1 | µA | 4 | ||||
| Input offset current (error amplifier) | 500 | nA | 4 | ||||
| Common mode range (error amplifier) | 0 | V | VIN = 8 V to 40 V; upper limit printed as VIN–2 V | 4 | |||
| Open loop gain | 80 | 100 | dB | VO = 1.2 V to 3 V | 4 | ||
| Unity gain bandwidth | 1 | 1.5 | MHz | TJ = 25°C | 4 | ||
| CMRR (error amplifier) | 75 | 100 | dB | VCM = 0 V to 38 V, VIN = 40 V | 4 | ||
| PSRR (error amplifier) | 80 | 100 | dB | VIN = 8 V to 40 V | 4 | ||
| Output sink current (error amplifier) | 5 | 10 | mA | VID = –15 mV, VCOMP = 1.2 V | 4 | ||
| Output source current (error amplifier) | -0.4 | -0.5 | mA | VID = 15 mV, VCOMP = 2.5 V | 4 | ||
| High-level output voltage (error amplifier) | 4.3 | 4.6 | 4.9 | V | VID = 50 mV, RL (COMP) = 15 kΩ | 4 | |
| Low-level output voltage (error amplifier) | 0.7 | 1 | V | VID = –50 mV, RL (COMP) = 15 kΩ | 4 | ||
| Amplifier gain (current sense) | 2.5 | 2.75 | 3 | V/V | VCS– = 0 V, CL SS open | 4 | |
| Maximum differential input signal (current sense) | 1.1 | 1.2 | V | CL SS open, RL (COMP) = 15 kΩ | 4 | ||
| Input offset voltage (current sense) | 5 | 35 | mV | VCL SS = 0.5 V, COMP open | 4 | ||
| CMRR (current sense) | 60 | dB | VCM = 0 V to 3 V | 4 | |||
| PSRR (current sense) | 60 | dB | VIN = 8 V to 40 V | 4 | |||
| Input bias current (current sense) | -1 | 1 | µA | VCL SS = 0.5 V, COMP open | 4 | ||
| Input offset current (current sense) | -1 | 1 | µA | VCL SS = 0.5 V, COMP open | 4 | ||
| Input common mode range (current sense) | 0 | 3 | V | 4 | |||
| Delay to outputs (current sense) | 120 | 250 | ns | VEA+ = VREF, EA– = 0 V, CS+ – CS– = 0 V to 1.5 V | 4 | ||
| Current limit offset | 0.4 | 0.5 | 0.6 | V | VCS– = 0 V, VCS+ = 0 V, COMP open | 4 | |
| Input bias current (current limit adjust) | -10 | -30 | µA | VEA+ = VREF, VEA– = 0 V | 4 | ||
| Threshold voltage (SHUTDOWN) | 0.95 | 1 | 1.05 | V | 4 | ||
| Input voltage range (SHUTDOWN) | 0 | 5 | V | 4 | |||
| Minimum latching current (ICL SS) | 3 | mA | Footnote 5: current into CL SS assured to latch circuit into shutdown state | 4 | |||
| Maximum non-latching current (ICL SS) | 0.8 | mA | Footnote 6: current into CL SS assured not to latch circuit into shutdown state | 4 | |||
| Delay to outputs (SHUTDOWN) | 65 | 110 | ns | VSHUTDOWN = 0 V to 1.3 V | 4 | ||
| Collector-emitter voltage | 40 | V | 5 | ||||
| Off-state bias current | 250 | µA | VC = 40 V | 5 | |||
| Output low level voltage | 0.1 | 0.5 | V | IOUT = 20 mA | 5 | ||
| Output low level voltage | 0.5 | 2.6 | V | IOUT = 200 mA | 5 | ||
| Output high level voltage | 12.5 | 13.2 | V | IOUT = –20 mA | 5 | ||
| Output high level voltage | 12 | 13.1 | V | IOUT = –200 mA | 5 | ||
| Rise time | 40 | 80 | ns | C1 = 1 nF | 5 | ||
| Fall time | 40 | 80 | ns | C1 = 1 nF | 5 | ||
| UVLO low saturation voltage | 0.8 | 1.5 | V | VIN = 0 V, IOUT = 20 mA | 5 | ||
| Maximum duty cycle | 45 | 47 | 50 | % | 5 | ||
| Minimum duty cycle | 0 | % | 5 | ||||
| Startup threshold (UVLO) | 7.7 | 8 | V | 5 | |||
| Threshold hysteresis (UVLO) | 0.7 | V | 5 | ||||
| Supply current | 18 | 23 | mA | Total standby current | 5 |
CAD (KiCad official)
- Symbol:
UC2856QDWRQ1 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
uc2856qdwrq1-etched.step/uc2856qdwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc2856qdwrq1.step/uc2856qdwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
51576f2bd2b22621, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).