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UC2845BN

Public Made by Adom

by adom

lingxingic AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UC2845BN

lingxingic · AC-DC Controllers And Regulators · DIP-8

UC2845BN from lingxingic, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP passive Error amplifier output and compensation node, with the error amplifier sink current limited to 10 mA (Isink(EA)) in the absolute maximum ratings.
2 VFB input Error amplifier inverting feedback input with input bias current of -0.1 uA typical and -2 uA maximum at VFB=5 V.
3 ISENSE input Current sense input to the PWM comparator with a maximum input signal of 1 V (0.9 to 1.1 V) and a current sense gain of 3 V/V.
4 RT/CT passive Oscillator timing node where RT and CT set the switching frequency, tested at RT=10 kΩ and CT=3.3 nF, with operation up to 500 kHz.
5 GROUND power_in Ground reference pin of the controller.
6 OUTPUT output Push-pull output stage that sources or sinks up to ±1 A to drive MOSFET power devices.
7 Vi power_in Supply input with an absolute maximum of 30 V from a low-impedance source, tested at 15 V.
8 VREF power_out Internal reference output of 5.00 V typical (4.90 to 5.10 V) at Io=1 mA, with short-circuit current of -30 to -180 mA.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (low impedance source) Vi 30 V 6
Output current IO -1 1 A 6
Error amplifier output sink current Isink(EA) 10 mA 6
Analog input range Vin(EA) -0.3 6.3 V 6
Thermal resistance junction to ambient, DIP8 θJA 110 ℃/W JEDEC 2S2P 6
Operating temperature Tamb -40 105 ℃ 6
Storage temperature Tstg -65 150 ℃ 6
Soldering temperature, DIP8 TL 250 ℃ 10 s 6
VREF output voltage VREF 4.9 5 5.1 V Io=1mA 6
Line regulation ∆VREF 2 20 mV 12V≤Vi≤25V 6
Load regulation ∆VREF 3 25 mV 1≤Io≤20mA 6
VREF temperature coefficient ∆VREF/△T 0.25 mV/℃ (注 4) 6
VREF total output variation 4.7 5.3 V line, load, temperature 6
VREF short circuit current ISC -180 -100 -30 mA (注 4) 6
Oscillator frequency fOSC 49 52 55 kHz Tj=25℃ 6
Oscillator frequency over temperature fOSC 48 56 kHz Tamb=Tlow to Thigh 6
Oscillator frequency with RT=6.2kΩ, CT=1nF fOSC 225 250 275 kHz Tj=25℃ (RT=6.2kΩ，CT=1nF) 6
Frequency voltage stability ∆fOSC/∆V 0.2 1 % Vi=12V～25V 6
Frequency temperature stability ∆fOSC/∆T 0.55 % Tamb=-40～105℃ (注 4) 6
Oscillator peak-to-peak amplitude VOSC 1.6 V peak to peak 6
Discharge current Idischg 7.6 8.3 9 mA VOSC=2V; Tj=25℃，Tamb=-40～105℃ 6
Error amplifier input voltage V2 2.42 2.5 2.58 V VPIN1=2.5V 6
Error amplifier input bias current Ib -0.1 -2 uA VFB=5V 6
Open loop voltage gain AVOL 65 90 dB 2V≤Vo≤4V 7
Unity gain bandwidth BW 0.7 1 MHz Tj=25℃ (注 4) 7
Error amplifier power supply rejection ratio PSRR 60 70 dB 12V≤Vi≤25V 7
Output sink current IO 2 12 mA VPIN2=2.7V，VPIN1=1.1V 7
Output source current IO -0.5 -1 mA VPIN2=2.3V，VPIN1=5V 7
Output high voltage VOUT High 5 6.2 V VPIN2=2.3V；RL=15KΩ to ground 7
Output low voltage VOUT Low 0.8 1.1 V VPIN2=2.7V；RL=15KΩ to PIN 8 7
Current sense gain GV 2.85 3 3.15 V/V (注 5、6) 7
Maximum input signal V3 0.9 1 1.1 V VPIN1=5V (注 5) 7
Current sense power supply rejection ratio SVR 70 dB 12V≤Vi≤25V (注 5) 7
Current sense input bias current Ib -2 -10 uA 7
Propagation delay 150 300 ns (注 4) 7
Output low voltage at Isink=20mA VOL 0.1 0.4 V Isink=20mA 7
Output low voltage at Isink=200mA VOL 1.6 2.2 V Isink=200mA 7
Output high voltage at Isource=20mA VOH 13 13.5 V Isource=20mA 7
Output high voltage at Isource=200mA VOH 12 13.5 V Isource=200mA 7
UVLO latch saturation voltage VOLS 0.1 1.1 V Vi=6V，ISINK=1mA 7
Output rise time tr 50 150 ns CL=1nF (注 4) 7
Output fall time tf 50 150 ns CL=1nF (注 4) 7
UVLO turn-on threshold voltage (UC2845 variant) VTH(ST) 7.8 8.8 9.4 V 7
UVLO minimum operating voltage (UC2845 variant) VOPR(MIN) 7 7.6 8.2 V 7
Maximum duty cycle (UC2844/5 variant) 47 48 50 % 7
Minimum duty cycle 0 % 7
Start-up current Ist 0.3 0.9 mA 7
Operating supply current Ii 12 20 mA VPIN2=VPIN3=0V 7
Zener voltage Viz 30 36 V Ii=25mA 7

CAD (KiCad official)

  • Symbol: UC2845BN
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: uc2845bn-etched.step / uc2845bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2845bn.step / uc2845bn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (11 pp, sha256 8dbc34365386c5bd, retrieved 2026-10-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF