component
UC2845AD8TR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# UC2845AD8TR++**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8++UC2845AD8TR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | Low-impedance 1MHz internal error amplifier output, also peak current limiting or PWM comparator input with 80dB open-loop gain (AVOL); maximum sink current 6mA, internally unprotected. |+| 2 | FB | input | Error amplifier input for controlling power converter voltage feedback loop to achieve stability. |+| 3 | ISENSE | input | Peak current limiting or PWM comparator input; when used with current sensing resistor, error amplifier output controls cycle-by-cycle peak current limiting of power system; maximum peak current sensing signal internally clamped to 1V. |+| 4 | RT/CT | input | Internal oscillator input, programmed with external timing resistor (RT) and timing capacitor (CT); recommended capacitor 470pF to 4.7nF, timing resistor 5kΩ to 100kΩ. |+| 5 | GND | power_in | Controller signal ground. |+| 6 | OUTPUT | output | 1A totem pole gate driver output; can source/sink up to 1A of gate driver current; gate driver resistor required to limit current. |+| 7 | VCC | power_in | Gate driver bias input; requires bypass capacitor with capacitance at least 10 times larger than main switch FET gate capacitance. |+| 8 | VREF | power_in | Reference voltage output of PWM controller; must supply current not exceeding 10mA during normal operation; short-circuit protected at approximately 100mA; requires 1µF high-frequency bypass capacitor and VCC capacitor at least 10 times larger than VREF capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UC2845AD8TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `uc2845ad8tr-etched.step` / `uc2845ad8tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc2845ad8tr.step` / `uc2845ad8tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/uc2845a) (54 pp, sha256 `1f5ad8805f414728`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/uc2845ad8tr-datasheet.pdf)
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maximum sink current 6mA, internally unprotected."+ },+ {+ "number": "2",+ "name": "FB",+ "type": "input",+ "description": "Error amplifier input for controlling power converter voltage feedback loop to achieve stability."+ },+ {+ "number": "3",+ "name": "ISENSE",+ "type": "input",+ "description": "Peak current limiting or PWM comparator input; when used with current sensing resistor, error amplifier output controls cycle-by-cycle peak current limiting of power system; maximum peak current sensing signal internally clamped to 1V."+ },+ {+ "number": "4",+ "name": "RT/CT",+ "type": "input",+ "description": "Internal oscillator input, programmed with external timing resistor (RT) and timing capacitor (CT); recommended capacitor 470pF to 4.7nF, timing resistor 5kΩ to 100kΩ."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Controller signal ground."+ },+ {+ "number": "6",+ "name": "OUTPUT",+ "type": "output",+ "description": "1A totem pole gate driver output; can source/sink up to 1A of gate driver current; gate driver resistor required to limit current."+ },+ {+ "number": "7",+ "name": "VCC",+ "type": "power_in",+ "description": "Gate driver bias input; requires bypass capacitor with capacitance at least 10 times larger than main switch FET gate capacitance."+ },+ {+ "number": "8",+ "name": "VREF",+ "type": "power_in",+ "description": "Reference voltage output of PWM controller; must supply current not exceeding 10mA during normal operation; short-circuit protected at approximately 100mA; requires 1µF high-frequency bypass capacitor and VCC capacitor at least 10 times larger than VREF capacitor."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 27,+ "cost_usd": 0.2008,+ "at": "2026-10-07T08:21:25"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/uc2845a",+ "pages": 54,+ "sha256": "1f5ad8805f414728",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "uc2845ad8tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "uc2845ad8tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "bf9a048980d2472fb5edd4122a461cc99c3e1257acae3425ce8d1df6d4aa793a",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}