component
UC2844N
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 19d ago |
| viewers | 19d ago |
| package.json | 19d ago |
| page.json | 19d ago |
| README.md | 19d ago |
| uc2844n-etched.glb | 19d ago |
| uc2844n-etched.step | 19d ago |
| uc2844n-hero.glb | 19d ago |
| uc2844n-hero.overlay.json | 19d ago |
| uc2844n.glb | 19d ago |
| uc2844n.kicad_mod | 19d ago |
| uc2844n.kicad_sym | 19d ago |
| uc2844n.lbr | 19d ago |
| uc2844n.step | 19d ago |
UC2844N
Texas Instruments · AC-DC Controllers And Regulators · DIP-8
UC2844N from Texas Instruments, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output for external compensation; the error amplifier has internal current limiting, so forcing COMP to GROUND externally sets zero duty cycle. |
| 2 | VFB | input | Inverting input of the internal error amplifier used to close the power converter voltage feedback loop; keep the lead short and stray capacitance low for stability, with a recommended input voltage of 2.5 V. |
| 3 | ISENSE | input | Primary-side current sense input to the PWM comparator, connected to the MOSFET current sense resistor; the recommended input voltage is 1 V, and an RC filter may be needed to avoid false triggering from leading-edge spikes. |
| 4 | RT/CT | bidirectional | Oscillator timing pin: RT connects from VREF and CT to GROUND to set fOSC = 1.72/(RT x CT); RT must never be less than 5 kΩ, and on UCx844 the switching frequency is half of fOSC. |
| 5 | GROUND | power_in | Analog and power ground for this package (no separate PWRGND pin); keep the timing capacitor and bypass returns on a single point ground and separate the high-current gate driver return from the signal return. |
| 6 | OUTPUT | output | Totem-pole gate driver for an external MOSFET, sourcing and sinking peak currents up to 1 A, and actively held low when VCC is below the turn-on threshold. |
| 7 | VCC | power_in | Supply input for the analog controller and gate driver bias; total VCC current is the static current plus average OUTPUT current (IOUTPUT = Qg x fSW), and a bypass capacitor of typically 0.1 µF must be placed directly at this pin to GROUND. |
| 8 | VREF | power_out | 5 V reference output that supplies the timing charging current and internal logic; it must be bypassed to GROUND with at least a 0.1 µF ceramic capacitor placed close to the pin, and external loads need additional bypassing. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UC2844N - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
uc2844n-etched.step/uc2844n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc2844n.step/uc2844n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
0f875fd24cbb5fda, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).