component

UC2844BD1R2G

Public Made by Adom

by adom

onsemi AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs uc2844bd1r2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json uc2844bd1r2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md uc2844bd1r2g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
uc2844bd1r2g-etched.fit.json uc2844bd1r2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
uc2844bd1r2g-etched.glb uc2844bd1r2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
uc2844bd1r2g-etched.step uc2844bd1r2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
uc2844bd1r2g.glb Publish 0.1.0 · Ray
uc2844bd1r2g.kicad_mod Publish 0.1.0 · Ray
uc2844bd1r2g.kicad_sym Publish 0.1.0 · Ray
uc2844bd1r2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
uc2844bd1r2g.step Publish 0.1.0 · Ray

UC2844BD1R2G

onsemi · AC-DC Controllers and Regulators · SOIC-8

UC2844BD1R2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Compensation output Error amplifier output, used for loop compensation. Typically tied to Voltage Feedback (pin 2) through an R-C network to set the closed-loop bandwidth and phase margin. Output swings from ~0.8 V (low) up to ~6.2 V (high) with ~1 mA source / 12 mA sink capability.
2 Voltage Feedback input Inverting input of the internal error amplifier. Normally connected to the switching-supply output through a resistor divider; internal reference is 2.5 V. Input bias current typically -0.1 µA, max -1.0 µA (UC284xB) at V_FB = 5.0 V.
3 Current Sense input Input to the PWM current-sense comparator. A voltage proportional to the switch/inductor current (developed across an external current-sense resistor) is applied here. Peak comparator threshold is 1.0 V typical (max 1.1 V); internal current-sense-to-output voltage gain A_V = 3.0 V/V.
4 RT/CT passive Oscillator timing pin. An external resistor R_T from Vref to this pin and a timing capacitor C_T from this pin to GND set the oscillator frequency (f_OSC ≈ 1.72 / (R_T·C_T) for R_T > 5 kΩ). Also sets the maximum output duty cycle (~50% max via internal blanking on alternate cycles).
5 GND power_in Device ground (single ground pin on the 8-pin package; combined signal and power return). All bypass capacitors and the current-sense resistor should return here with a low-impedance path.
6 Output output High-current totem-pole gate-drive output for driving an external power MOSFET. Rated 1.0 A peak source/sink; typical rise/fall time 50 ns into 1.0 nF. Output is held low with V_CC below the UVLO threshold.
7 VCC power_in Positive supply input for control logic and gate driver. UC2844B UVLO turn-on = 16 V typ, turn-off = 10 V typ (large hysteresis for bootstrap start-up). Startup current 0.3 mA typ; operating current 12 mA typ. Absolute max 36 V (internally clamped by zener; limit I_CC + I_Z ≤ 30 mA).
8 Vref power_out Trimmed 5.0 V reference output (±1% at 25 °C, I_O = 1.0 mA). Sources up to ~20 mA for external circuitry; internally current-limited to -85 mA (typ) short-circuit. Bypass to GND with a low-ESR ceramic capacitor.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • UC2844BD1R2G
  • UC2844BD1R2GD1G
  • UC2844BD1R2GN
  • UC2844BD1R2GNG
  • UC2844BD1R2GD
  • UC2844BD1R2GDG
  • UC2844BD1R2GDR2
  • UC2844BD1R2GDR2G

CAD (KiCad official)

  • Symbol: UC2844BD1R2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: uc2844bd1r2g-etched.step / uc2844bd1r2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2844bd1r2g.step / uc2844bd1r2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
uc2844bd1r2g.step 122 KB You want the bare part, or you mark your own boards.
uc2844bd1r2g-etched.step 2.7 MB You want the part with UC2844BD1R2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 649 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (19 pp, sha256 e69ff39fc0ea9e08, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF