UC2844BD1R2G

@@ -26,7 +26,9 @@       "model_3d_step": "uc2844bd1r2g.step",       "lbr": "uc2844bd1r2g.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C77262"+    },     "pins": [       {         "number": "1",@@ -38,7 +40,7 @@         "number": "2",         "name": "Voltage Feedback",         "type": "input",-        "description": "Inverting input of the internal error amplifier. Normally connected to the switching-supply output through a resistor divider; internal reference is 2.5 V. Input bias current typically -0.1 µA, max -1.0 µA (UC284xB) at V_FB = 5.0 V."+        "description": "Inverting input of the internal error amplifier. Normally connected to the switching-supply output through a resistor divider; internal reference is 2.5 V. Input bias current typically -0.1 \u00b5A, max -1.0 \u00b5A (UC284xB) at V_FB = 5.0 V."       },       {         "number": "3",@@ -50,7 +52,7 @@         "number": "4",         "name": "RT/CT",         "type": "passive",-        "description": "Oscillator timing pin. An external resistor R_T from Vref to this pin and a timing capacitor C_T from this pin to GND set the oscillator frequency (f_OSC ≈ 1.72 / (R_T·C_T) for R_T > 5 kΩ). Also sets the maximum output duty cycle (~50% max via internal blanking on alternate cycles)."+        "description": "Oscillator timing pin. An external resistor R_T from Vref to this pin and a timing capacitor C_T from this pin to GND set the oscillator frequency (f_OSC \u2248 1.72 / (R_T\u00b7C_T) for R_T > 5 k\u03a9). Also sets the maximum output duty cycle (~50% max via internal blanking on alternate cycles)."       },       {         "number": "5",@@ -68,13 +70,13 @@         "number": "7",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply input for control logic and gate driver. UC2844B UVLO turn-on = 16 V typ, turn-off = 10 V typ (large hysteresis for bootstrap start-up). Startup current 0.3 mA typ; operating current 12 mA typ. Absolute max 36 V (internally clamped by zener; limit I_CC + I_Z ≤ 30 mA)."+        "description": "Positive supply input for control logic and gate driver. UC2844B UVLO turn-on = 16 V typ, turn-off = 10 V typ (large hysteresis for bootstrap start-up). Startup current 0.3 mA typ; operating current 12 mA typ. Absolute max 36 V (internally clamped by zener; limit I_CC + I_Z \u2264 30 mA)."       },       {         "number": "8",         "name": "Vref",         "type": "power_out",-        "description": "Trimmed 5.0 V reference output (±1% at 25 °C, I_O = 1.0 mA). Sources up to ~20 mA for external circuitry; internally current-limited to -85 mA (typ) short-circuit. Bypass to GND with a low-ESR ceramic capacitor."+        "description": "Trimmed 5.0 V reference output (\u00b11% at 25 \u00b0C, I_O = 1.0 mA). Sources up to ~20 mA for external circuitry; internally current-limited to -85 mA (typ) short-circuit. Bypass to GND with a low-ESR ceramic capacitor."       }     ],     "provenance": {

@@ -62,6 +62,18 @@   <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="UC2844BD1R2G">@@ -81,8 +93,8 @@   <text x="0" y="7.62" size="1.27" layer="95" align="bottom-center">&gt;NAME</text>   <text x="0" y="-10.16" size="1.27" layer="96" align="top-center">&gt;VALUE</text>   <pin name="Compensation" x="-17.78" y="2.54" length="middle" direction="out"/>-  <pin name="Voltage Feedback" x="-17.78" y="0" length="middle" direction="in"/>-  <pin name="Current Sense" x="-17.78" y="-2.54" length="middle" direction="in"/>+  <pin name="Voltage_Feedback" x="-17.78" y="0" length="middle" direction="in"/>+  <pin name="Current_Sense" x="-17.78" y="-2.54" length="middle" direction="in"/>   <pin name="RT/CT" x="-17.78" y="-5.08" length="middle" direction="pas"/>   <pin name="Vref" x="17.78" y="2.54" length="middle" direction="out" rot="R180"/>   <pin name="VCC" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>@@ -100,15 +112,21 @@     <device name="" package="UC2844BD1R2G">       <connects>         <connect gate="G$1" pin="Compensation" pad="1"/>-        <connect gate="G$1" pin="Voltage Feedback" pad="2"/>-        <connect gate="G$1" pin="Current Sense" pad="3"/>+        <connect gate="G$1" pin="Voltage_Feedback" pad="2"/>+        <connect gate="G$1" pin="Current_Sense" pad="3"/>         <connect gate="G$1" pin="RT/CT" pad="4"/>         <connect gate="G$1" pin="Vref" pad="8"/>         <connect gate="G$1" pin="VCC" pad="7"/>         <connect gate="G$1" pin="Output" pad="6"/>         <connect gate="G$1" pin="GND" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="UC2844BD1R2G" constant="no"/>+          <attribute name="MANUFACTURER" value="onsemi" constant="no"/>+          <attribute name="LCSC_PN" value="C77262" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>