component
UC2844AQD8R-TUDI
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Tudi AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"package": "SOP-8",
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"pins": [
{
"number": "1",
"name": "COMP",
"type": "output",
"description": "Output of the low-impedance 1-MHz internal error amplifier, which is also the input to the peak current limit or PWM comparator, with an open-loop gain (AVOL) of 80 dB; it can sink a maximum of 6 mA and is not internally current limited."
},
{
"number": "2",
"name": "FB",
"type": "input",
"description": "Input to the error amplifier that can be used to control the power converter voltage-feedback loop for stability."
},
{
"number": "3",
"name": "ISENSE",
"type": "input",
"description": "Input to the peak current limit and PWM comparator, where the maximum peak current sense signal is internally clamped to 1 V."
},
{
"number": "4",
"name": "RT/CT",
"type": "input",
"description": "Input to the internal oscillator programmed by an external timing resistor (RT) and timing capacitor (CT); TUDI recommends CT from 470 pF to 4.7 nF and RT from 5 kΩ to 100 kΩ."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "This is the controller signal ground."
},
{
"number": "6",
"name": "OUTPUT",
"type": "output",
"description": "Output of the 1-A totem-pole gate driver that can sink and source up to 1 A of gate driver current, and a gate driver resistor must be used to limit that current."
},
{
"number": "7",
"name": "VCC",
"type": "power_in",
"description": "Bias input to the gate driver, which must have a biasing capacitor at least 10 times greater than the gate capacitance of the main switching FET used in the design."
},
{
"number": "8",
"name": "VREF",
"type": "power_out",
"description": "Reference voltage output that must supply no more than 10 mA under normal operation, is short-circuit protected at roughly 100 mA, and needs a 1 µF high-frequency bypass capacitor with the VCC capacitor at least 10 times larger."
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