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Contents

README

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UC2844AQD8R

Texas Instruments · DC-DC Controllers · SOIC-8

UC2844AQD8R from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Low-impedance 1MHz internal error amplifier output, also the input to the peak current limit/PWM comparator, with 80dB open-loop gain; maximum sink current is 6mA and it is not internally current-limited.
2 FB input Error amplifier input used to close the power converter voltage feedback loop and set loop stability.
3 ISENSE input Input to the controller peak current limit/PWM comparator; with a current sense resistor the error amplifier output sets cycle-by-cycle peak current limit, and the maximum peak sense signal is internally clamped at 1V.
4 RT/CT input Internal oscillator timing input programmed with external RT and CT; TI recommends CT between 470pF and 4.7nF and RT between 5kΩ and 100kΩ.
5 GND power_in Controller signal ground.
6 OUTPUT output 1A totem-pole gate driver output that sources and sinks up to 1A; a gate driver resistor must be used to limit the gate drive current.
7 VCC power_in Bias input for the gate driver and controller; the datasheet gives an 11V minimum recommended VCC and a 30V absolute maximum, and the bias capacitor must be at least 10 times the main switching FET gate capacitance.
8 VREF power_out PWM controller 5V reference output that must supply no more than 10mA in normal operation, is short-circuit protected at about 100mA, and requires a 1µF high-frequency bypass capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Supply Chip
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reference output voltage VREF 4.95 5 5.05 V TJ = 25°C, IO = 1mA (UC184xA, UC284xA) 6
Reference line regulation 6 20 mV 12 ≤ VIN ≤ 25V 6
Reference load regulation 6 25 mV 1 ≤ IO ≤ 20mA 6
Reference temperature stability 0.2 0.4 mV/°C See notes (1), (6) 6
Reference total output variation 4.9 5.1 V Line, load, temperature (UC184xA, UC284xA) 6
Reference long-term stability 5 25 mV TA = 125°C, 1000 hours 6
Output short-circuit current -30 -100 -180 mA 6
Oscillator initial accuracy 47 52 57 kHz TJ = 25°C 6
Oscillator voltage stability VCC 0.2 1 % 12 ≤ VCC ≤ 25V 6
Oscillator temperature stability 5 % TMIN ≤ TA ≤ TMAX 6
Oscillator discharge current 7.8 8.3 8.8 mA TJ = 25°C, VRT/CT = 2V 6
Oscillator discharge current (UC284xA) 7.5 8.8 mA VRT/CT = 2V 6
Error amplifier input voltage VCOMP 2.45 2.5 2.55 V VCOMP = 2.5V (UC184xA, UC284xA) 7
Error amplifier input bias current -0.3 -1 µA 7
Error amplifier open-loop gain AVOL 65 90 dB 2 ≤ VO ≤ 4V 7
Error amplifier unity-gain bandwidth 0.7 1 MHz TJ = 25°C 7
Error amplifier common-mode rejection ratio CMRR 60 70 dB 12 ≤ VCC ≤ 25V 7
Error amplifier output sink current 2 6 mA VFB = 2.7V, VCOMP = 1.1V 7
Error amplifier output source current -0.5 -0.8 mA VFB = 2.3V, VCOMP = 5V 7
Error amplifier VOUT high VOUT 5 6 V VFB = 2.3V, RL = 15kΩ to ground 7
Error amplifier VOUT low VOUT 0.7 1.1 V VFB = 2.7V, RL = 15kΩ to VREF 7
Current sense gain 2.85 3 3.15 V/V See notes (2), (3) 7
Current sense maximum input signal 0.9 1 1.1 V VCOMP = 5V 7
Current sense input bias current -2 -10 µA 7
Current sense delay to output 150 300 ns VISENSE = 0V to 2V 7
Output low saturation voltage 0.1 0.4 V ISINK = 20mA 7
Output low saturation voltage (high current) 15 2.2 V ISINK = 200mA 7
Output high saturation voltage 13 13.5 V ISOURCE = 20mA 7
Output high saturation voltage (high current) 12 13.5 V ISOURCE = 200mA 7
Output rise time 50 150 ns TJ = 25°C, CL = 1nF 7
Output fall time 50 150 ns TJ = 25°C, CL = 1nF 7
UVLO saturation voltage 0.7 1.2 V VCC = 5V, ISINK = 10mA 7
UVLO start threshold (UC2844A) 15 16 17 V UC1842A, UC1844A, UC2842A and UC2844A 7
UVLO minimum operating voltage after turn-on (UC2844A) 9 10 11 V UC1842A, UC1844A, UC2842A and UC2844A 7
Maximum duty cycle (UCx844A) 47 48 50 % UCx844A, UCx845A 7
Minimum duty cycle 0 % 7
Startup current 0.3 0.5 mA 7
Operating supply current 11 17 mA VFB = VISENSE = 0V 7
VCC zener voltage 30 34 V ICC = 25mA 7
Supply voltage VCC (low-impedance source) VCC 30 V VCC pin 5
Output current IOUT -1 1 A 5
Output energy (capacitive load) 5 µJ Capacitive load 5
Analog inputs voltage -0.3 6.3 V 5
Maximum negative voltage, all pins -0.3 V All pins 5
Differential voltage between VC and VCC -0.3 V VC pin 5
Error amplifier output sink current ICOMP 10 mA 5
Power dissipation 1 W TA ≤ 25°C 5
Lead temperature (soldering) 300 °C 10 s 5
Junction temperature TJ -55 150 °C 5
Storage temperature Tstg -65 150 °C 5
VCC bias supply voltage VCC 11 V VCC pin 5
Analog pin voltage (FB, ISENSE, RT/CT) VFB, VRC, VVFB -0.1 5 V FB, ISENSE and RT/CT pins 5
Gate driver output voltage VOUT -0.1 V Maximum is VCC 5
Supply bias current IVCC 25 mA 5
VREF output current IVREF 10 mA VREF pin 5
Oscillator frequency fOSC 500 kHz 5
Operating ambient temperature (UC284xA) TA -40 85 °C Natural ventilation 5
Junction-to-ambient thermal resistance (D, 8-pin SOIC) RθJA 104.3 °C/W D (SOIC), 8 pins 6
Junction-to-case (top) thermal resistance (D, 8-pin SOIC) RθJC(top) 46.8 °C/W D (SOIC), 8 pins 6
Junction-to-board thermal resistance (D, 8-pin SOIC) RθJB 45.3 °C/W D (SOIC), 8 pins 6

CAD (KiCad official)

  • Symbol: UC2844AQD8R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: uc2844aqd8r-etched.step / uc2844aqd8r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2844aqd8r.step / uc2844aqd8r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 0eebf00e4b265207, retrieved 2026-10-22, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF