component

UC2844AN

Public Made by Adom

by adom

Texas Instruments AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)uc2844anfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 21d ago
viewers uc2844an: viewers · Ray 21d ago
package.json Publish 0.1.0 · Ray 21d ago
page.json Set visibility: public · Ray 21d ago
README.md Initial commit: component/uc2844an · Ray 21d ago
uc2844an-etched.glb uc2844an: factory component page (tier=lcsc) · Ray 21d ago
uc2844an-etched.step uc2844an: factory component page (tier=lcsc) · Ray 21d ago
uc2844an-hero.glb uc2844an: hero GLB from the etched model (keeps the MPN mark) · Ray 20d ago
uc2844an-hero.overlay.json Publish 0.1.0 · Ray 21d ago
uc2844an.glb Publish 0.1.0 · Ray 21d ago
uc2844an.kicad_mod Publish 0.1.0 · Ray 21d ago
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uc2844an.lbr Publish 0.1.0 · Ray 21d ago
uc2844an.step Publish 0.1.0 · Ray 21d ago

UC2844AN

Texas Instruments · AC-DC Controllers And Regulators · DIP-8

UC2844AN from Texas Instruments, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Low-impedance 1MHz internal error amplifier output (open-loop gain AVOL 80dB), also feeding the peak current limit/PWM comparator; it can sink a maximum of 6mA and is not internally current-limited.
2 FB input Error amplifier input used to close the power converter voltage feedback loop and set its stability.
3 ISENSE input Input to the peak current limit / PWM comparator, where the maximum peak current sense signal is internally clamped to 1V.
4 RT/CT input Internal oscillator timing input programmed with external timing resistor RT and timing capacitor CT; TI recommends CT of 470pF to 4.7nF and RT of 5kΩ to 100kΩ.
5 GND power_in Controller signal ground.
6 OUTPUT output 1A totem-pole gate driver output that can source and sink up to 1A, and a gate driver resistor must be used to limit the gate drive current.
7 VCC power_in Gate driver bias supply input (absolute maximum 30V, recommended minimum 11V) that requires a bias capacitor at least 10 times the gate capacitance of the main switching FET.
8 VREF power_out PWM controller reference voltage output that must supply no more than 10mA in normal operation, is short-circuit protected at about 100mA, and needs a 1µF high-frequency bypass capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: UC2844AN
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: uc2844an-etched.step / uc2844an-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2844an.step / uc2844an.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (54 pp, sha256 1f5ad8805f414728, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF