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UC2843AQD8RQ1

Texas Instruments · AC-DC Controllers And Regulators · SOIC-8

UC2843AQD8RQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Low-impedance 1-MHz internal error amplifier output, also the input to the peak current limit/PWM comparator, with 90 dB open-loop gain; it can sink a maximum of 6 mA and is not internally current limited.
2 FB input Input to the error amplifier, used to control the power converter voltage-feedback loop for stability.
3 ISENSE input Input to the peak current limit and PWM comparator, where the maximum peak current sense signal is internally clamped to 1 V.
4 RT/CT input Input to the internal oscillator programmed by timing resistor RT and timing capacitor CT; TI recommends CT from 470 pF to 4.7 nF and RT from 5 kΩ to 100 kΩ.
5 GND power_in Controller signal ground.
6 OUTPUT output Output of the 1-A totem-pole gate driver that can source and sink up to 1 A, and a gate driver resistor must be used to limit gate driver current.
7 VCC power_in Bias input to the gate driver, which must have a bias capacitor at least 10 times greater than the gate capacitance of the main switching FET.
8 VREF power_out Reference voltage output that must supply no more than 10 mA under normal operation, is short-circuit protected at roughly 100 mA, and needs a 1-µF high-frequency bypass capacitor (VCC capacitor at least 10 times the VREF capacitor).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC voltage (low impedance source), VCC pin 30 V low impedance source 4
Output current IOUT -1 1 A 4
Output energy (capacitive load) 5 µJ 4
Analog inputs (pins 2, 3, and 4) -0.3 6.3 V pins 2, 3, and 4 4
Maximum negative voltage, All pins -0.3 V All pins 4
Error amplifier output sink current ICOMP 10 mA 4
Power dissipation 1 W TA ≤ 25°C 4
Lead temperature 300 °C soldering, 10 s 4
Junction temperature TJ -55 150 °C 4
Storage temperature Tstg -65 150 °C 4
Bias supply voltage, VCC pin VCC 11 V 4
Voltage on analog pins FB, ISENSE, and RT/CT VFB, VRC, VVFB -0.1 5 V 4
Gate driver output voltage VOUT -0.1 V 4
Supply bias current IVCC 25 mA 4
Output current, VREF pin IVREF 10 mA 4
Oscillator frequency fOSC 500 kHz 4
Operating free-air temperature TA -40 125 °C 4
Output voltage 4.95 5 5.05 V TJ = 25°C, IO = 1 mA 5
Line regulation 6 20 mV 12 ≤ VIN ≤ 25 V 5
Load regulation 6 25 mV 1 ≤ IO ≤ 20 mA 5
Temperature stability 0.2 0.4 mV/°C 5
Total output variation 4.9 5.1 V Line, Load, Temperature 5
Output short circuit -30 -100 -180 mA 5
Long-term stability 5 25 mV TA = 125°C, 1000 hrs 5
Initial accuracy 47 52 57 kHz TJ = 25°C 5
Voltage stability 0.2 1 % 12 ≤ VCC ≤ 25 V 5
Discharge current 7.8 8.3 8.8 mA TJ = 25°C, VRT/CT = 2 V 5
Discharge current 7.5 8.8 mA VRT/CT = 2 V 5
Input voltage 2.45 2.5 2.55 V VCOMP = 2.5 V 6
Input bias current -0.3 -1 µA 6
AVOL Open-loop gain AVOL 65 90 dB 2 ≤ VO ≤ 4 V 6
Unity gain bandwidth 0.7 1 MHz TJ = 25°C 6
Common mode rejection ratio CMRR 60 70 dB 12 ≤ VCC ≤ 25 V 6
Output sink current 2 6 mA VFB = 2.7 V, VCOMP = 1.1 V 6
Output source current -0.5 -0.8 mA VFB = 2.3 V, VCOMP = 5 V 6
VOUT high 5 6 V VFB = 2.3 V, RL = 15 kΩ to ground 6
VOUT low 0.7 1.1 V VFB = 2.7 V, RL = 15 kΩ to VREF 6
Gain 2.85 3 3.15 V/V 6
Maximum input signal 0.9 1 1.1 V VCOMP = 5 V 6
Input bias current (ISENSE) -2 -10 µA 6
Delay to output 150 300 ns VISENSE = 0 to 2 V 6
Output low level 0.1 0.4 V ISINK = 20 mA 6
Output low level 1.5 2.2 V ISINK = 200 mA 6
Output high level 13 13.5 V ISOURCE = 20 mA 6
Output high level 12 13.5 V ISOURCE = 200 mA 6
Rise time 25 150 ns TJ = 25°C, CL = 1 nF 6
Fall time 25 150 ns TJ = 25°C, CL = 1 nF 6
UVLO saturation 0.7 1.2 V VCC = 5 V, ISINK = 10 mA 6
Start threshold 7.8 8.4 9 V 6
Minimum operation voltage after turnon 7 7.6 8.2 V 6
Maximum duty cycle 92 96 100 % 6
Minimum duty cycle 0 % 6
Start-up current 0.3 0.5 mA 6
Operating supply current 11 17 mA VFB = VISENSE = 0 V 6
VCC Zener voltage 30 39 V ICC = 25 mA 6
Thermal impedance, junction to ambient (package) θJA 117.4 °C/W 4

CAD (KiCad official)

  • Symbol: UC2843AQD8RQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: uc2843aqd8rq1-etched.step / uc2843aqd8rq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2843aqd8rq1.step / uc2843aqd8rq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 6dc2b496157a1c02, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF