# UC2842BD1

**STMicroelectronics** · DC-DC Controllers · SO-8

UC2842BD1 from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | This pin is the Error Amplifier output and is made available for loop compensation. |
| 2 | VFB | input | This is the inverting input of the Error Amplifier, normally connected to the switching power supply output through a resistor divider. |
| 3 | ISENSE | input | A voltage proportional to inductor current is connected to this input, and the PWM uses this information to terminate the output switch conduction. |
| 4 | RT/CT | passive | The oscillator frequency and maximum output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground, and operation to 500kHz is possible. |
| 5 | GROUND | power_in | This pin is the combined control circuitry and power ground. |
| 6 | OUTPUT | output | This output directly drives the gate of a power MOSFET, and peak currents up to 1A are sourced and sunk by this pin. |
| 7 | VCC | power_in | This pin is the positive supply of the control IC. |
| 8 | VREF | power_out | This is the reference output that provides charging current for capacitor CT through resistor RT. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (low impedance source) | Vi |  |  | 30 | V |  | 2 |
| Output Current | IO | -1 |  | 1 | A |  | 2 |
| Output Energy (capacitive load) | EO |  |  | 5 | µJ | capacitive load | 2 |
| Analog Inputs (pins 2, 3) |  | -0.3 |  | 5.5 | V |  | 2 |
| Error Amplifier Output Sink Current |  |  |  | 10 | mA |  | 2 |
| Power Dissipation (SO8) | Ptot |  |  | 800 | mW | Tamb ≤ 25 °C | 2 |
| Storage Temperature Range | Tstg | -65 |  | 150 | °C |  | 2 |
| Junction Operating Temperature | TJ | -40 |  | 150 | °C |  | 2 |
| Lead Temperature | TL |  |  | 300 | °C | soldering 10s | 2 |
| Thermal Resistance Junction-ambient (SO8) | Rth j-amb |  |  | 150 | °C/W |  | 3 |
| Output Voltage (VREF) | VREF | 4.95 | 5 | 5.05 | V | Tj = 25°C, Io = 1mA | 3 |
| Total Output Variation | VREF | 4.9 |  | 5.1 | V | Line, Load, Temperature | 3 |
| Line Regulation | ∆VREF |  | 2 | 20 | mV | 12V ≤ Vi ≤ 25V | 3 |
| Load Regulation | ∆VREF |  | 3 | 25 | mV | 1 ≤ Io ≤ 20mA | 3 |
| Temperature Stability | ∆VREF/∆T |  | 0.2 |  | mV/°C | Note 2 | 3 |
| Output Short Circuit | ISC | -30 | -100 | -180 | mA |  | 3 |
| Frequency Change with Voltage | ∆fOSC/∆V |  | 0.2 | 1 | % | VCC = 12V to 25V | 3 |
| Frequency Change with Temperature | ∆fOSC/∆T |  | 1 |  | % | TA = Tlow to Thigh | 3 |
| Oscillator Voltage Swing (peak to peak) | VOSC |  | 1.6 |  | V |  | 3 |
| Error Amp Input Voltage | V2 | 2.45 | 2.5 | 2.55 | V | VPIN1 = 2.5V | 3 |
| Input Bias Current (error amp) | Ib |  | -0.1 | -1 | µA | VFB = 5V | 3 |
| Open Loop Gain | AVOL | 65 | 90 |  | dB | 2V ≤ Vo ≤ 4V | 3 |
| Unity Gain Bandwidth | BW | 0.7 | 1 |  | MHz | TJ = 25°C | 3 |
| Power Supply Rejection Ratio | PSRR | 60 | 70 |  | dB | 12V ≤ Vi ≤ 25V | 3 |
| Output Sink Current | Io | 2 | 12 |  | mA | VPIN2 = 2.7V, VPIN1 = 1.1V | 3 |
| Output Source Current | Io | -0.5 | -1 |  | mA | VPIN2 = 2.3V, VPIN1 = 5V | 3 |
| VOUT High | VOUT | 5 | 6.2 |  | V | VPIN2 = 2.3V; RL = 15KΩ to Ground | 3 |
| VOUT Low | VOUT | 0.8 | 1.1 |  | V | VPIN2 = 2.7V; RL = 15KΩ to Pin 8 | 3 |
| Gain | GV | 2.85 | 3 | 3.15 | V/V | note 3 & 4 | 3 |
| Maximum Input Signal | V3 | 0.9 | 1 | 1.1 | V | VPIN1 = 5V (note 3) | 3 |
| Supply Voltage Rejection | SVR |  | 70 |  | dB | 12 ≤ Vi ≤ 25V (note 3) | 3 |
| Input Bias Current (current sense) | Ib | -2 | -10 |  | µA |  | 3 |
| Delay to Output |  | 150 | 300 |  | ns |  | 3 |
| Output Low Level | VOL |  | 0.1 | 0.4 | V | ISINK = 20mA | 4 |
| Output Low Level | VOL |  | 1.6 | 2.2 | V | ISINK = 200mA | 4 |
| Output High Level | VOH | 13 | 13.5 |  | V | ISOURCE = 20mA | 4 |
| Output High Level | VOH | 12 | 13.5 |  | V | ISOURCE = 200mA | 4 |
| UVLO Saturation | VOLS |  | 0.1 | 1.1 | V | VCC = 6V; ISINK = 1mA | 4 |
| Rise Time | tr |  | 50 | 150 | ns | Tj = 25°C, CL = 1nF | 4 |
| Fall Time | tf |  | 50 | 150 | ns | Tj = 25°C, CL = 1nF | 4 |
| Start Threshold (X842B/4B) |  | 15 | 16 | 17 | V |  | 4 |
| Min Operating Voltage After Turn-on (X842B/4B) |  | 9 | 10 | 11 | V |  | 4 |
| Maximum Duty Cycle (X842B/3B) |  | 94 | 96 | 100 | % |  | 4 |
| Start-up Current (UCX842B/44B) | Ist |  | 0.3 | 0.5 | mA | Vi = 14V | 4 |
| Operating Supply Current | Ii |  | 12 | 17 | mA | VPIN2 = VPIN3 = 0V | 4 |
| Zener Voltage | Viz | 30 | 36 |  | V | Ii = 25mA | 4 |

## CAD (KiCad official)

- Symbol: `UC2842BD1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `uc2842bd1-etched.step` / `uc2842bd1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc2842bd1.step` / `uc2842bd1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/uc2842bd1.pdf) (15 pp, sha256 `fedfd7362400f8b3`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uc2842bd1-datasheet.pdf)