component
UC2842B
Public Made by Adomby adom
UMW DC-DC Converters, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 1mo ago |
| viewers | 1mo ago |
| package.json | 1mo ago |
| page.json | 25d ago |
| README.md | 25d ago |
| uc2842b-etched.glb | 1mo ago |
| uc2842b-etched.step | 1mo ago |
| uc2842b-hero.glb | 1mo ago |
| uc2842b-hero.overlay.json | 1mo ago |
| uc2842b.glb | 1mo ago |
| uc2842b.kicad_mod | 1mo ago |
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| uc2842b.lbr | 1mo ago |
| uc2842b.step | 1mo ago |
UC2842B
UMW · DC-DC Converters · SOP-8
UC2842B from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | This pin is the error amplifier output and is made for loop compensation. |
| 2 | VFB | input | This is the inverting input of the error amplifier, normally connected to the switching power supply output through a resistor divider; the analog input absolute maximum range is -0.3 V to 5.5 V. |
| 3 | ISENSE | input | A voltage proportional to inductor current is connected to this input, which the PWM uses to terminate output switch conduction; the analog input absolute maximum range is -0.3 V to 5.5 V. |
| 4 | RT/CT | passive | The oscillator frequency and maximum output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. |
| 5 | GND | power_in | This pin is the combined control circuitry and power ground. |
| 6 | OUTPUT | output | This output directly drives the gate of a power MOSFET, sourcing and sinking peak currents up to 1 A. |
| 7 | VCC | power_in | This pin is the positive supply of the integrated circuit; the absolute maximum supply voltage is 30 V (low impedance source). |
| 8 | VREF | power_out | This is the reference output, which provides charging current for capacitor CT through resistor RT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (low impedance source) | VCC | 30 | V | low impedance source | 3 | ||
| Output Current | IO | -1 | 1 | A | 3 | ||
| Input Voltage (Analog Inputs pins 2,3) | VI | -0.3 | 5.5 | V | 3 | ||
| Error Amp Output Sink Current | ISINK (E.A) | 10 | mA | 3 | |||
| Power Dissipation (TA=25°C) | PD | 1 | W | TA=25°C | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature (soldering 5 sec.) | TL | 260 | °C | soldering 5 sec. | 3 | ||
| Operating Ambient Temperature | TA | -25 | 85 | °C | 3 | ||
| Reference Output Voltage | VREF | 4.95 | 5 | 5.05 | V | TJ=25°C, IREF=1mA | 4 |
| Undervoltage Lockout Start Threshold (2842) | VTH(ST) | 15 | 16 | 17 | V | 5 | |
| Min. Operating Voltage (After Turn On) (2842) | VOPR(min) | 9 | 10 | 11 | V | 5 | |
| Max. Duty Cycle (2842/43) | D(MAX) | 95 | 97 | 100 | % | 5 |
CAD (KiCad official)
- Symbol:
UC2842B - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
uc2842b-etched.step/uc2842b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc2842b.step/uc2842b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (13 pp, sha256
d748ab15bdd235a3, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).