component

UC2825N

Public Made by Adom

by adom

Texas Instruments DC-DC Controllers, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsuc2825nfactory-2.0.0extractor-text

Verified UC2825N

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: UC2825N · PDIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 22-page datasheet
  • ✓distributor: lcsc C1519430, digikey 296-11171-5-ND, mouser 595-UC2825N
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-8a_hw7e7/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ uc2825n.kicad_sym✓ uc2825n.kicad_mod✓ uc2825n.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
uc2825n / README.md
History Download
Ray Publish 0.1.0 5b6eb41 8d ago

UC2825N

Texas Instruments · DC-DC Controllers · PDIP-16

UC2825N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INV input Inverting input of the error amplifier; absolute maximum -0.3V to 7V.
2 NI input Non-inverting input of the error amplifier; absolute maximum -0.3V to 7V.
3 E/A Out output Error amplifier output, limited to 5mA output current, which drives the PWM comparator.
4 Clock output Oscillator clock output, limited to -5mA output current.
5 RT passive Oscillator timing resistor connection that sets the charging current, limited to -5mA, with analog input range -0.3V to 7V.
6 CT passive Oscillator timing capacitor connection, with analog input range -0.3V to 6V.
7 Ramp input Ramp input to the PWM comparator, with analog input range -0.3V to 6V.
8 Soft Start passive Soft-start pin that doubles as a maximum duty cycle clamp, charged at 9µA typical with a 20mA maximum sink current.
9 ILIM/SD input Current limit and shutdown input with a 1.0V typical current limit threshold and a 1.40V typical shutdown threshold.
10 Gnd power_in Signal ground, the reference for all voltages.
11 Out A output Totem pole output A, with 0.5A DC and 2.0A pulse (0.5µs) maximum source or sink current.
12 Pwr Gnd power_in Power ground for the output stage.
13 Vc power_in Supply for the output totem pole stage, to be bypassed with a 0.1µF ceramic capacitor.
14 Out B output Totem pole output B, with 0.5A DC and 2.0A pulse (0.5µs) maximum source or sink current.
15 Vcc power_in Positive supply voltage with an absolute maximum of 30V and a 9.2V typical UVLO start threshold.
16 VREF 5.1V power_out 5.1V reference output, to be bypassed with a 0.1µF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-16
Category Power Management ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage 5.05 5.1 5.15 V TO = 25°C, IO = 1mA 3
Line Regulation 2 20 mV 10V < VCC < 30V 3
Load Regulation 5 20 mV 1mA < IO < 10mA 3
Temperature Stability 0.2 0.4 mV/°C TMIN < TA < TMAX 3
Total Output Variation 5 5.2 V Line, Load, Temperature 3
Output Noise Voltage 50 µV 10Hz < f < 10kHz 3
Long Term Stability 5 25 mV TJ = 125°C, 1000hrs. 3
Short Circuit Current -15 -50 -100 mA VREF = 0V 3
Initial Accuracy 360 400 440 kHz TJ = 2°C 3
Voltage Stability 0.2 2 % 10V < VCC < 30V 3
Temperature Stability (oscillator) 5 % TMIN < TA < TMAX 3
Total Variation 340 460 kHz Line, Temperature 3
Clock Out High 3.9 4.5 V 3
Clock Out Low 2.3 2.9 V 3
Ramp Peak 2.6 2.8 3 V 3
Ramp Valley 0.7 1 1.25 V 3
Ramp Valley to Peak 1.6 1.8 2 V 3
Input Offset Voltage 10 15 mV 3
Input Bias Current 0.6 3 µA 3
Input Offset Current 0.1 1 µA 3
Open Loop Gain 60 95 dB 1V < VO < 4V 3
CMRR 75 95 dB 1.5V < VCM < 5.5V 3
PSRR 85 110 dB 10V < VCC < 30V 3
Output Sink Current 1 2.5 mA VPIN 3 = 1V 3
Output Source Current -0.5 -1.3 mA VPIN 3 = 4V 3
Output High Voltage 4 4.7 5 V IPIN 3 = -0.5mA 3
Output Low Voltage 0 0.5 1 V IPIN 3 = 1mA 3
Unity Gain Bandwidth 3 5.5 MHz 3
Slew Rate 6 12 V/µs 3
Pin 7 Bias Current -1 -5 µA VPIN 7 = 0V 4
Duty Cycle Range 0 80 % 4
Pin 3 Zero DC Threshold 1.1 1.25 V VPIN 7 = 0V 4
Delay to Output (PWM comparator) 50 80 ns 4
Soft-Start Charge Current 3 9 20 µA VPIN 8 = 0.5V 4
Soft-Start Discharge Current 1 mA VPIN 8 = 1V 4
Pin 9 Bias Current 15 µA 0 < VPIN 9 < 4V 4
Current Limit Threshold 0.9 1 1.1 V 4
Shutdown Threshold 1.25 1.4 1.55 V 4
Delay to Output (current limit/shutdown) 50 80 ns 4
Output Low Level 0.25 0.4 V IOUT = 20mA 4
Output Low Level 1.2 2.2 V IOUT = 200mA 4
Output High Level 13 13.5 V IOUT = -20mA 4
Output High Level 12 13 V IOUT = -200mA 4
Collector Leakage 100 500 µA VC = 30V 4
Rise/Fall Time 30 60 ns CL = 1nF 4
Start Threshold 8.8 9.2 9.6 V 4
UVLO Hysteresis 0.4 0.8 1.2 V 4
Start Up Current 1.1 2.5 mA VCC = 8V 4
ICC ICC 22 33 mA VPIN 1, VPIN 7, VPIN 9 = 0V; VPIN 2 = 1V 4
Supply Voltage (Pins 13, 15) 30 V Pins 13, 15 2
Output Current, Source or Sink DC (Pins 11, 14) 0.5 A DC, Pins 11, 14 2
Output Current, Source or Sink Pulse (Pins 11, 14) 2 A Pulse (0.5 s), Pins 11, 14 2
Analog Inputs (Pins 1, 2, 7) -0.3 7 V Pins 1, 2, 7 2
Analog Inputs (Pins 8, 9) -0.3 6 V Pins 8, 9 2
Clock Output Current (Pin 4) -5 mA Pin 4 2
Error Amplifier Output Current (Pin 3) 5 mA Pin 3 2
Soft Start Sink Current (Pin 8) 20 mA Pin 8 2
Oscillator Charging Current (Pin 5) -5 mA Pin 5 2
Power Dissipation 1 W 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering) 300 °C Soldering, 10 seconds 2
Thermal Resistance Junction-to-Ambient (DIL-16N) JA 90 DIL-16N (PDIP N) package 2
Thermal Resistance Junction-to-Case (DIL-16N) JC 45 DIL-16N (PDIP N) package 2
Operating Ambient Temperature (UC2825) TA -40 85 °C UC2825 specifications apply, -40°C<TA<85°C 3

CAD (KiCad official)

  • Symbol: UC2825N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: PDIP-16 (KiCad packages3D, STEP)
  • 3D model files: uc2825n-etched.step / uc2825n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2825n.step / uc2825n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 5481058c2f897c75, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF