component
UC2825AMDWREP
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# UC2825AMDWREP++**Texas Instruments** · DC-DC Converters · SOIC-16-300mil++UC2825AMDWREP from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | INV | input | Inverting input to the error amplifier. |+| 2 | NI | input | Noninverting input to the error amplifier. |+| 3 | EAOUT | output | Output of the error amplifier, used for loop compensation. |+| 4 | CLK/LEB | output | Buffered output of the internal oscillator that also sets the leading-edge blanking period through an external capacitor, with clock output current rated to -5 mA. |+| 5 | RT | input | Timing resistor connection for oscillator frequency programming, with recommended values from 1 kΩ to 100 kΩ. |+| 6 | CT | input | Timing capacitor connection for oscillator frequency programming, which should be connected to device ground with minimal trace length. |+| 7 | RAMP | input | Noninverting input to the PWM comparator with 1.25-V internal offset, serving as feed-forward input in voltage-mode operation or slope-compensation input in peak current mode. |+| 8 | SS | input | Soft-start pin that also acts as the maximum duty cycle clamp, with soft-start sink current rated to 20 mA. |+| 9 | ILIM | input | Input to the current-limit comparator, which terminates the pulse above the 1-V threshold after blanking and sets the fault latch above 1.2 V. |+| 10 | GND | power_in | Analog ground return for the control circuitry. |+| 11 | OUTA | output | High-current totem-pole output A of the on-chip drive stage, rated 0.5 A DC and 2.2 A pulse (0.5 ms) source or sink. |+| 12 | PGND | power_in | Ground return for the output driver stage, which should be kept separate from analog ground and is rated ±0.2 V. |+| 13 | VC | power_in | Power supply for the output stage, rated to 22 V absolute maximum and to be bypassed with a low-ESL ceramic capacitor placed with minimal trace length. |+| 14 | OUTB | output | High-current totem-pole output B of the on-chip drive stage, rated 0.5 A DC and 2.2 A pulse (0.5 ms) source or sink. |+| 15 | VCC | power_in | Power supply for the device, rated to 22 V absolute maximum and to be bypassed with a low-ESL ceramic capacitor placed with minimal trace length. |+| 16 | VREF | power_out | 5.1-V reference output, which should be bypassed with a low-ESL ceramic capacitor placed with minimal trace length to the ground plane. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16-300mil |+| Category | Power Management (PMIC) |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `UC2825AMDWREP`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)+- 3D model files: `uc2825amdwrep-etched.step` / `uc2825amdwrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uc2825amdwrep.step` / `uc2825amdwrep.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/uc2825a-ep) (23 pp, sha256 `e4dae8b70863cbf0`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/uc2825amdwrep-datasheet.pdf)
page.jsonadded+248@@ -0,0 +1,248 @@+{+ "slug": "uc2825amdwrep",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "uc2825amdwrep",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "uc2825amdwrep.kicad_sym",+ "uc2825amdwrep.kicad_mod",+ "uc2825amdwrep.glb",+ "uc2825amdwrep.step",+ "uc2825amdwrep.lbr",+ "docs/hero.png",+ "docs/uc2825amdwrep-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "uc2825amdwrep-hero.glb",+ "uc2825amdwrep-hero.overlay.json"+ ],+ "component": {+ "mpn": "UC2825AMDWREP",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16-300mil",+ "pin_count": 16,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/uc2825a-ep",+ "parts": {+ "symbol": "uc2825amdwrep.kicad_sym",+ "footprint": "uc2825amdwrep.kicad_mod",+ "model_3d": "uc2825amdwrep-hero.glb",+ "model_3d_plain": "uc2825amdwrep.glb",+ "model_3d_step": "uc2825amdwrep-etched.step",+ "model_3d_step_plain": "uc2825amdwrep.step",+ "lbr": "uc2825amdwrep.lbr"+ },+ "distributor_links": {+ "lcsc": "C2658090",+ "digikey": "296-21292-2-ND",+ "mouser": "595-UC2825AMDWREP"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T23:57:44Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-21292-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-UC2825AMDWREP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "INV",+ "type": "input",+ "description": "Inverting input to the error amplifier."+ },+ {+ "number": "2",+ "name": "NI",+ "type": "input",+ "description": "Noninverting input to the error amplifier."+ },+ {+ "number": "3",+ "name": "EAOUT",+ "type": "output",+ "description": "Output of the error amplifier, used for loop compensation."+ },+ {+ "number": "4",+ "name": "CLK/LEB",+ "type": "output",+ "description": "Buffered output of the internal oscillator that also sets the leading-edge blanking period through an external capacitor, with clock output current rated to -5 mA."+ },+ {+ "number": "5",+ "name": "RT",+ "type": "input",+ "description": "Timing resistor connection for oscillator frequency programming, with recommended values from 1 kΩ to 100 kΩ."+ },+ {+ "number": "6",+ "name": "CT",+ "type": "input",+ "description": "Timing capacitor connection for oscillator frequency programming, which should be connected to device ground with minimal trace length."+ },+ {+ "number": "7",+ "name": "RAMP",+ "type": "input",+ "description": "Noninverting input to the PWM comparator with 1.25-V internal offset, serving as feed-forward input in voltage-mode operation or slope-compensation input in peak current mode."+ },+ {+ "number": "8",+ "name": "SS",+ "type": "input",+ "description": "Soft-start pin that also acts as the maximum duty cycle clamp, with soft-start sink current rated to 20 mA."+ },+ {+ "number": "9",+ "name": "ILIM",+ "type": "input",+ "description": "Input to the current-limit comparator, which terminates the pulse above the 1-V threshold after blanking and sets the fault latch above 1.2 V."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Analog ground return for the control circuitry."+ },+ {+ "number": "11",+ "name": "OUTA",+ "type": "output",+ "description": "High-current totem-pole output A of the on-chip drive stage, rated 0.5 A DC and 2.2 A pulse (0.5 ms) source or sink."+ },+ {+ "number": "12",+ "name": "PGND",+ "type": "power_in",+ "description": "Ground return for the output driver stage, which should be kept separate from analog ground and is rated ±0.2 V."+ },+ {+ "number": "13",+ "name": "VC",+ "type": "power_in",+ "description": "Power supply for the output stage, rated to 22 V absolute maximum and to be bypassed with a low-ESL ceramic capacitor placed with minimal trace length."+ },+ {+ "number": "14",+ "name": "OUTB",+ "type": "output",+ "description": "High-current totem-pole output B of the on-chip drive stage, rated 0.5 A DC and 2.2 A pulse (0.5 ms) source or sink."+ },+ {+ "number": "15",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply for the device, rated to 22 V absolute maximum and to be bypassed with a low-ESL ceramic capacitor placed with minimal trace length."+ },+ {+ "number": "16",+ "name": "VREF",+ "type": "power_out",+ "description": "5.1-V reference output, which should be bypassed with a low-ESL ceramic capacitor placed with minimal trace length to the ground plane."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin-function table on page 3 lists VCC (pin 15) with type 'O' and VC (pin 13) with no direction; bot; VREF has no I/O direction in the terminal table. It is described as the 5.1-V reference, so it is ty; CLK/LEB is marked 'O' in the table; typed output. The datasheet notes this pin no longer accepts an "+ ],+ "pages_sent": 23,+ "cost_usd": 0.092,+ "at": "2026-10-07T23:57:27"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/uc2825a-ep",+ "pages": 23,+ "sha256": "e4dae8b70863cbf0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "uc2825amdwrep.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "uc2825amdwrep-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "8ef1622a785308952cf2417ae219a93ca67b74a83a02024501e4219734fa1728",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}