Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

UC2625DWTR

Texas Instruments · Brushless DC (BLDC) Motor Driver · SOIC-28-300mil

UC2625DWTR from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E/A OUT output Error amplifier output; output swing range 0.25 V to 3.50 V; pull-up current -16 to -5 μA; drives PWM comparator and may be tied to E/A IN(−) for closed-loop compensation.
2 VREF power_out Trimmed 5.0 V reference output (4.7-5.3 V over operating range); maximum advised load 30 mA; short-circuit current 50-150 mA; must be bypassed with at least 0.1 μF to GND.
3 ISENSE output Current-sense amplifier output; ISENSE = 2.5 V + 2 ×
4 ISENSE1 input Differential current-sense input 1; input range −1 V to +2 V; input bias current -850 to 0 μA to 0 V; offset current ±12 μA max; use matched filter resistors ≤2 kΩ for accuracy.
5 ISENSE2 input Differential current-sense input 2; interchangeable with ISENSE1; input range −1 V to +2 V; input bias current -850 to 0 μA; differential input may be as high as ±0.5 V before saturation.
6 DIR input Motor direction latch input; threshold 0.8-2.0 V, hysteresis 0.6 V; input current -30 to 30 μA; direction change is inhibited when SPEED-IN exceeds 250 mV to prevent unsafe reversal.
7 SPEED-IN input Speed-sense input used to gate the direction latch; threshold 220-290 mV (typ 257 mV); input current -30 to 30 μA; typically connected to TACH-OUT through an RC filter.
8 H1 input Hall-effect shaft-position sensor input 1; TTL-compatible low threshold 0.8-1.2 V, high threshold 1.6-2.0 V; pull-down input current -400 to -120 μA over operating range.
9 H2 input Hall-effect shaft-position sensor input 2; TTL-compatible low threshold 0.8-1.2 V, high threshold 1.6-2.0 V; pull-down input current -400 to -120 μA over operating range.
10 H3 input Hall-effect shaft-position sensor input 3; TTL-compatible low threshold 0.8-1.2 V, high threshold 1.6-2.0 V; pull-down input current -400 to -120 μA over operating range.
11 PWR VCC power_in Power supply pin for the PD totem-pole drivers; carries all current sourced by PDA, PDB, and PDC; may be current-limited with a series resistor when driving Darlington bases.
12 PDC output Low-side totem-pole driver C; active high turns on a low-side device; Vol 0.36-0.8 V at 50 mA; Voh 1.75-2.2 V below VCC at 50 mA; 10%-90% rise/fall time 50 ns into 1 nF.
13 PDB output Low-side totem-pole driver B; active high turns on a low-side device; Vol 0.36-0.8 V at 50 mA; Voh 1.75-2.2 V below VCC at 50 mA; 10%-90% rise/fall time 50 ns into 1 nF.
14 PDA output Low-side totem-pole driver A; active high turns on a low-side device; Vol 0.36-0.8 V at 50 mA; Voh 1.75-2.2 V below VCC at 50 mA; 10%-90% rise/fall time 50 ns into 1 nF.
15 GND power_in Ground reference; all internal thresholds and outputs except the PU and PD supply rails are referred to this pin.
16 PUC output High-side open-collector driver C; active low commands a high-side device on; rated to 50 V; leakage ≤25 μA at 50 V; Vol 1.0-1.8 V at 50 mA; fall time 50 ns at 50 mA.
17 PUB output High-side open-collector driver B; active low commands a high-side device on; rated to 50 V; leakage ≤25 μA at 50 V; Vol 1.0-1.8 V at 50 mA; fall time 50 ns at 50 mA.
18 PUA output High-side open-collector driver A; active low commands a high-side device on; rated to 50 V; leakage ≤25 μA at 50 V; Vol 1.0-1.8 V at 50 mA; fall time 50 ns at 50 mA.
19 VCC power_in Main logic and control supply; operating range 10 V to 18 V; under-voltage lockout keeps all outputs off below 7.5 V; turn-on threshold 8.65-9.45 V; bypass with 0.1 μF ceramic.
20 TACH-OUT output Tachometer output; fires a fixed-width 5 V pulse (on-time 170-280 μs) on each H1/H2/H3 transition; high level 4.7-5.3 V into 10 kΩ; low level ≤0.2 V; average voltage is proportional to speed.
21 RC-BRAKE bidirectional RC brake timing and brake-command pin; external RT (10 kΩ-500 kΩ) and CT (1 nF-100 nF) to GND set discharge window T = 0.67 RTCT; pulling pin below 0.8-1.2 V threshold commands full-brake mode; input current -4.0 to -1.9 mA.
22 QUAD SEL input Two/four-quadrant chopping selection input; low selects two-quadrant, high selects four-quadrant; threshold 0.8-2.0 V; hysteresis 70 mV; input current -30 to 150 μA.
23 OV-COAST input Over-voltage shutdown and coast input; inhibit threshold 1.65-1.85 V; restart threshold 1.55-1.75 V; hysteresis 0.05-0.15 V; input current -10 to 0 μA; accepts TTL, 5-V CMOS, or 12-V CMOS.
24 SSTART bidirectional Soft-start pin; internal transistor discharges an external capacitor fully on undervoltage or overcurrent fault; clamps E/A OUT to SSTART voltage; restart threshold 0.1-0.3 V; discharge current 0.1-3.0 mA.
25 RC-OSC passive Oscillator RC timing pin; connect ROSC (10 kΩ-100 kΩ) to VREF and COSC (1 nF-100 nF) to GND; oscillator frequency F ≈ 2/(ROSC × COSC); ramp is ≈1.2 V peak-to-peak centered at 1.6 V; 40-60 kHz typical.
26 PWM IN input PWM comparator input; compared to E/A OUT to generate the PWM chop command; input current 0-30 μA; typically connected to the RC-OSC ramp for voltage-mode PWM control.
27 E/A IN(-) input Error amplifier inverting input; input current -5 to +5 μA; common-mode input range 0 V to 3 V; input offset ±10 mV; tie to E/A OUT for unity-gain buffer configuration.
28 E/A IN(+) input Error amplifier non-inverting input; input current -5 to +5 μA; common-mode input range 0 V to 3 V; voltage gain 70-90 dB; can be driven by ISENSE output, TACH-OUT filter, or external command voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-28-300mil
Category Motor Driver ICs
Pins 28

CAD (KiCad official)

  • Symbol: UC2625DWTR
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: uc2625dwtr-etched.step / uc2625dwtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uc2625dwtr.step / uc2625dwtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 dcf54a877fad8159, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF