# UA78L05AIPK

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

UA78L05AIPK from Texas Instruments, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated voltage output pin with 0.1 µF bypass capacitor recommended between output and ground. |
| 2 | COMMON | power_in | Ground reference pin. |
| 3 | INPUT | power_in | Input pin accepting 7 V to 20 V supply with 0.33 µF bypass capacitor recommended between input and ground. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (new chip, UA78L05AI) | VI |  |  | 45 | V | Absolute maximum; new chip, UA78L05AI listed | 4 |
| Junction temperature | TJ |  |  | 150 | °C | Absolute maximum | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| Input voltage | VI | 7 |  | 20 | V | UA78L05C and UA78L05AC row (both legacy and new chip); AI not named in this row | 4 |
| Output current | IO |  |  | 100 | mA |  | 4 |
| Operating junction temperature | TJ | -40 |  | 125 | °C | UA78L05AI (legacy chip and new chip) | 4 |
| Output voltage | VO | 4.8 | 5 | 5.2 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Output voltage | VO | 4.75 |  | 5.25 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = full range (legacy chip, UA78L05AC/AI) | 6 |
| Output voltage | VO | 4.95 | 5 | 5.15 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Output voltage | VO | 4.85 |  | 5.15 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = full range (new chip, UA78L05AC/AI) | 6 |
| Output voltage | VO | 4.8 |  | 5.14 | V | IO = 1 mA to 70 mA, TJ = full range (new chip, UA78L05AC/AI) | 6 |
| Input voltage regulation |  |  | 32 | 150 | mV | VI = 7 V to 20 V, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Input voltage regulation |  |  | 26 | 100 | mV | VI = 8 V to 20 V, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Input voltage regulation |  |  | 32 | 33 | mV | VI = 7 V to 20 V, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Input voltage regulation |  |  | 26 | 28 | mV | VI = 8 V to 20 V, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Ripple rejection |  | 41 | 49 |  | dB | VI = 8 V to 18 V, f = 120 Hz, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Ripple rejection |  | 48 | 55 |  | dB | VI = 8 V to 18 V, f = 120 Hz, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Output voltage regulation |  |  | 15 | 60 | mV | IO = 1 mA to 100 mA, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Output voltage regulation |  |  | 8 | 30 | mV | IO = 1 mA to 40 mA, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Output voltage regulation |  |  | 15 | 35 | mV | IO = 1 mA to 100 mA, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Output voltage regulation |  |  | 8 | 15 | mV | IO = 1 mA to 40 mA, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Bias current |  |  | 3.8 | 6 | mA | TJ = 25°C (legacy chip, UA78L05AC/AI) | 7 |
| Bias current |  |  |  | 5.5 | mA | TJ = 125°C (legacy chip, UA78L05AC/AI) | 7 |
| Bias current |  |  | 3.53 | 3.95 | mA | TJ = 25°C (new chip, UA78L05AC/AI) | 7 |
| Bias current |  |  |  | 4 | mA | TJ = 125°C (new chip, UA78L05AC/AI) | 7 |
| Bias current change |  |  |  | 1.5 | mA | VI = 8 V to 20 V, TJ = full range (legacy chip, UA78L05AC/AI) | 7 |
| Bias current change |  |  |  | 0.485 | mA | VI = 8 V to 20 V, TJ = full range (new chip, UA78L05AC/AI) | 7 |
| Bias current change |  |  |  | 0.01 | mA | IO = 1 mA to 40 mA, TJ = full range (new chip, UA78L05AC/AI) | 7 |
| Output noise voltage |  |  | 42 |  | µV | f = 10 Hz to 100 kHz, TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Output noise voltage |  |  | 125 |  | µV | f = 10 Hz to 100 kHz, TJ = 25°C (new chip, UA78L05AC/AI) | 6 |
| Dropout voltage |  |  | 1.7 |  | V | TJ = 25°C (legacy chip, UA78L05AC/AI) | 6 |
| Junction-to-ambient thermal resistance | RθJA |  | 54.7 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 88.1 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |
| Junction-to-board thermal resistance | RθJB |  | 9.6 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |
| Junction-to-top characterization parameter | ψJT |  | 6.2 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |
| Junction-to-board characterization parameter | ψJB |  | 9.7 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) |  | 7.7 |  | °C/W | PK (SOT-89, 3 pin) package | 5 |

## CAD (KiCad official)

- Symbol: `UA78L05AIPK`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `ua78l05aipk-etched.step` / `ua78l05aipk-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ua78l05aipk.step` / `ua78l05aipk.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ua78l) (47 pp, sha256 `223d628010f1d8e3`, retrieved 2026-09-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ua78l05aipk-datasheet.pdf)