component
UA78L05ACLPR
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), TO-92-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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UA78L05ACLPR
Texas Instruments · Linear Voltage Regulators (LDO) · TO-92-3
UA78L05ACLPR from Texas Instruments, in a TO-92-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated voltage output, delivering up to 100 mA of output current. |
| 2 | COMMON | power_in | Common ground pin of the regulator. |
| 3 | INPUT | power_in | Supply input; recommended 7 V to 20 V for UA78L05AC, absolute maximum 30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-92-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 4.8 | 5 | 5.2 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = 25°C | 5 |
| Output voltage | VO | 4.75 | 5.25 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = full range | 5 | |
| Input voltage regulation | 32 | 150 | mV | VI = 7 V to 20 V, TJ = 25°C | 5 | ||
| Input voltage regulation | 26 | 100 | mV | VI = 8 V to 20 V, TJ = 25°C | 5 | ||
| Ripple rejection | 41 | 49 | dB | VI = 8 V to 18 V, f = 120 Hz, TJ = 25°C | 5 | ||
| Output voltage regulation | 15 | 60 | mV | IO = 1 mA to 100 mA, TJ = 25°C | 5 | ||
| Output voltage regulation | 8 | 30 | mV | IO = 1 mA to 40 mA, TJ = 25°C | 5 | ||
| Bias current | 3.8 | 6 | mA | TJ = 25°C | 5 | ||
| Bias current | 5.5 | mA | TJ = 125°C | 5 | |||
| Bias current change | 1.5 | mA | VI = 8 V to 20 V, TJ = full range | 5 | |||
| Bias current change | 0.1 | mA | IO = 1 mA to 40 mA, TJ = full range | 5 | |||
| Output noise voltage | 42 | µV | f = 10 Hz to 100 kHz, TJ = 25°C | 5 | |||
| Dropout voltage | 1.7 | V | TJ = 25°C | 5 | |||
| Input voltage (recommended) | VI | 7 | 20 | V | UA78L05C and UA78L05AC | 4 | |
| Output current (recommended) | IO | 100 | mA | 4 | |||
| Operating virtual junction temperature | TJ | 0 | 125 | °C | UA78L00C and UA78L00AC series | 4 | |
| Input voltage (absolute maximum) | VI | 30 | V | Listed for UA78L05C; UA78L05AC not named | 4 | ||
| Virtual junction temperature (absolute maximum) | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD human body model | V(ESD) | 1000 | V | HBM, ANSI/ESDA/JEDEC JS-001, all pins | 4 | ||
| ESD charged device model | V(ESD) | 1000 | V | CDM, JESD22-C101, all pins | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 143.6 | °C/W | LP (TO-92), 3 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 74.4 | °C/W | LP (TO-92), 3 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 24.2 | °C/W | LP (TO-92), 3 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 120.9 | °C/W | LP (TO-92), 3 pins | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | Keep trace widths large enough to eliminate problematic I×R voltage drops at the input and output terminals. Bypass capacitors should be placed as close to the UA78L00 as possible. Additional copper a | 13 |
CAD (KiCad official)
- Symbol:
UA78L05ACLPR - Footprint:
Package_TO_SOT_THT:TO-92_Inline - 3D model: TO-92-3 (KiCad packages3D, STEP)
- 3D model files:
ua78l05aclpr-etched.step/ua78l05aclpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ua78l05aclpr.step/ua78l05aclpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
1c2abe4023ad787a, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# UA78L05ACLPR
**Texas Instruments** · Linear Voltage Regulators (LDO) · TO-92-3
UA78L05ACLPR from Texas Instruments, in a TO-92-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated voltage output, delivering up to 100 mA of output current. |
| 2 | COMMON | power_in | Common ground pin of the regulator. |
| 3 | INPUT | power_in | Supply input; recommended 7 V to 20 V for UA78L05AC, absolute maximum 30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-92-3 |
| Category | Power Supply Chip |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO | 4.8 | 5 | 5.2 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = 25°C | 5 |
| Output voltage | VO | 4.75 | | 5.25 | V | VI = 7 V to 20 V, IO = 1 mA to 40 mA, TJ = full range | 5 |
| Input voltage regulation | | | 32 | 150 | mV | VI = 7 V to 20 V, TJ = 25°C | 5 |
| Input voltage regulation | | | 26 | 100 | mV | VI = 8 V to 20 V, TJ = 25°C | 5 |
| Ripple rejection | | 41 | 49 | | dB | VI = 8 V to 18 V, f = 120 Hz, TJ = 25°C | 5 |
| Output voltage regulation | | | 15 | 60 | mV | IO = 1 mA to 100 mA, TJ = 25°C | 5 |
| Output voltage regulation | | | 8 | 30 | mV | IO = 1 mA to 40 mA, TJ = 25°C | 5 |
| Bias current | | | 3.8 | 6 | mA | TJ = 25°C | 5 |
| Bias current | | | | 5.5 | mA | TJ = 125°C | 5 |
| Bias current change | | | | 1.5 | mA | VI = 8 V to 20 V, TJ = full range | 5 |
| Bias current change | | | | 0.1 | mA | IO = 1 mA to 40 mA, TJ = full range | 5 |
| Output noise voltage | | | 42 | | µV | f = 10 Hz to 100 kHz, TJ = 25°C | 5 |
| Dropout voltage | | | 1.7 | | V | TJ = 25°C | 5 |
| Input voltage (recommended) | VI | 7 | | 20 | V | UA78L05C and UA78L05AC | 4 |
| Output current (recommended) | IO | | | 100 | mA | | 4 |
| Operating virtual junction temperature | TJ | 0 | | 125 | °C | UA78L00C and UA78L00AC series | 4 |
| Input voltage (absolute maximum) | VI | | | 30 | V | Listed for UA78L05C; UA78L05AC not named | 4 |
| Virtual junction temperature (absolute maximum) | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| ESD human body model | V(ESD) | | | 1000 | V | HBM, ANSI/ESDA/JEDEC JS-001, all pins | 4 |
| ESD charged device model | V(ESD) | | | 1000 | V | CDM, JESD22-C101, all pins | 4 |
| Junction-to-ambient thermal resistance | RθJA | | 143.6 | | °C/W | LP (TO-92), 3 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 74.4 | | °C/W | LP (TO-92), 3 pins | 4 |
| Junction-to-top characterization parameter | ψJT | | 24.2 | | °C/W | LP (TO-92), 3 pins | 4 |
| Junction-to-board characterization parameter | ψJB | | 120.9 | | °C/W | LP (TO-92), 3 pins | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | Keep trace widths large enough to eliminate problematic I×R voltage drops at the input and output terminals. Bypass capacitors should be placed as close to the UA78L00 as possible. Additional copper a | 13 |
## CAD (KiCad official)
- Symbol: `UA78L05ACLPR`
- Footprint: `Package_TO_SOT_THT:TO-92_Inline`
- 3D model: TO-92-3 (KiCad packages3D, STEP)
- 3D model files: `ua78l05aclpr-etched.step` / `ua78l05aclpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ua78l05aclpr.step` / `ua78l05aclpr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ua78l05aclpr.pdf) (34 pp, sha256 `1c2abe4023ad787a`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ua78l05aclpr-datasheet.pdf)