# U3525G-S16-R

**UTC(Unisonic Tech)** · RF Modulators And Demodulators · SOP-16

U3525G-S16-R from UTC(Unisonic Tech), in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INV.INPUT | input | Inverting input of the error amplifier, used with the non-inverting input to set the feedback loop (common-mode range 1.5 to 5.2 V per the error amplifier characteristics). |
| 2 | N.I.INPUT | input | Non-inverting input of the error amplifier, with a common-mode range of 1.5 to 5.2 V and a CMR of 60 dB minimum. |
| 3 | SYNC | input | Oscillator sync terminal with a sync threshold of 1.2 to 2.8 V and a sync input current of up to 2.5 mA at 3.5 V. |
| 4 | OSC.OUTPUT | output | Oscillator clock output with a clock amplitude of 3 to 3.5 V and a clock width of 0.3 to 1 µs. |
| 5 | CT | passive | Oscillator timing capacitor terminal, with a recommended range of 0.001 to 0.1 µF and a maximum current through the CT terminal of 5 mA. |
| 6 | RT | passive | Oscillator timing resistor terminal, with a recommended range of 2 to 150 kΩ. |
| 7 | DISCHARGE | passive | Discharge terminal for the oscillator dead-time circuit, used with the dead-time resistor RD whose range is 0 to 500 Ω. |
| 8 | SOFT-START | passive | Soft-start terminal with a current-source pull-up of 25 to 80 µA, which charges the external soft-start capacitor and is discharged during shutdown. |
| 9 | COMP | output | Error amplifier output and PWM comparator input for loop compensation; it can be pulled down by a signal sinking at most 100 µA to turn the outputs off. |
| 10 | SHUT DOWN | input | Shutdown input that immediately sets the PWM latch and starts a 150 µA sink discharging the soft-start capacitor on longer commands, and it must not be left floating. |
| 11 | OUTPUT A | output | Totem-pole output driver A with NOR logic (LOW for OFF), capable of sourcing or sinking up to 100 mA steady state and 400 mA peak. |
| 12 | GROUND | power_in | Ground reference for the IC. |
| 13 | VC | power_in | Collector supply for the output stages, rated 4.5 to 35 V. |
| 14 | OUTPUT B | output | Totem-pole output driver B with NOR logic (LOW for OFF), capable of sourcing or sinking up to 100 mA steady state and 400 mA peak. |
| 15 | +VI | power_in | Supply input for the IC, rated 8 to 35 V (40 V absolute maximum). |
| 16 | VREF | power_out | On-chip 5.1 V reference output trimmed to ±1%, with a load current of 0 to 20 mA and a 50 mA absolute maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UTC(Unisonic Tech) |
| Package | SOP-16 |
| Category | RF And Wireless |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | ViN |  |  | 40 | V |  | 4 |
| Collector Supply Voltage | VC |  |  | 40 | V |  | 4 |
| Oscillator Charging Current | IOSC |  |  | 5 | mA |  | 4 |
| Output Current, Source or Sink | Io |  |  | 500 | mA |  | 4 |
| Reference Output Current | IR |  |  | 50 | mA |  | 4 |
| Current through CT Terminal | IT |  |  | 5 | mA |  | 4 |
| Logic Inputs |  | -0.3 |  | 5.5 | V |  | 4 |
| Analog Inputs |  | -0.3 |  |  | V |  | 4 |
| Total Power Dissipation | PD |  |  | 1000 | mW | TA=70 °C | 4 |
| Junction Temperature | TJ | -55 |  | 125 | °C |  | 4 |
| Operating Ambient Temperature | TORP | 0 |  | 70 | °C |  | 4 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 4 |
| Input Voltage | VIN | 8 |  | 35 | V |  | 4 |
| Collector Supply Voltage | VC | 4.5 |  | 35 | V |  | 4 |
| Sink/Source Load Current (Steady State) | ISTEAD | 0 |  | 100 | mA |  | 4 |
| Sink/Source Load Current (Peak) | IPEAK | 0 |  | 400 | mA |  | 4 |
| Reference Load Current | ILOAD | 0 |  | 20 | mA |  | 4 |
| Oscillator Frequency Range | FO | 100 |  | 400 | K Hz |  | 4 |
| Oscillator Timing Resistor | RO | 2 |  | 150 | KΩ |  | 4 |
| Oscillator Timing Capacitor | CO | 0.001 |  | 0.1 | μF |  | 4 |
| Dead Time Resistor Range | RT | 0 |  | 500 | Ω |  | 4 |
| Output Voltage | VREF | 5 | 5.1 | 5.2 | V | TJ= 25°C | 5 |
| Total Output Variation |  | 4.95 |  | 5.25 | V | Line, Load and Temperature | 5 |
| Line Regulation | △VREF |  | 10 | 20 | mV | VIN= 8 ~ 35 V | 5 |
| Load Regulation | △VREF |  | 20 | 50 | mV | IL = 0 ~ 20 mA | 5 |
| Short Circuit Current |  |  | 80 | 100 | mA | VREF = 0, TJ = 25°C | 5 |
| Clock Amplitude |  | 3 | 3.5 |  | V | Note 1, 2 | 5 |
| Sync Threshold |  | 1.2 | 2 | 2.8 | V |  | 5 |
| Sync Input Current |  |  | 1 | 2.5 | mA | Sync Voltage = 3.5 V | 5 |
| Current Mirror |  | 1.7 | 2 | 2.2 | mA | IRT = 2 mA | 5 |
| Clock Width |  | 0.3 | 0.5 | 1 | μs | TJ = 25°C (Note 1, 2) | 5 |
| Initial Accuracy |  | -6 | 2 | 6 | % | TJ = 25°C (Note 1, 2) | 5 |
| Voltage Stability |  | -2 | 1 | 2 | % | VIN = 8 ~ 35 V (Note 1, 2) | 5 |
| Temperature Stability | △f /△T | -6 | 3 | 6 | % | Over Operating Range (Note 1) | 5 |
| Output Low Level |  |  | 0.2 | 0.5 | V | Error amplifier, VCM = 5.1 V | 5 |
| Output High Level |  |  | 3.8 | 5.6 | V | Error amplifier, VCM = 5.1 V | 5 |
| Input Offset Voltage | VOS |  | 2 | 10 | mV | Error amplifier, VCM = 5.1 V | 5 |
| Input Bias Current | Ib |  | 1 | 10 | μA | Error amplifier, VCM = 5.1 V | 5 |
| Comm. Mode Reject. | CMR |  | 60 | 75 | dB | VCM = 1.5 ~ 5.2 V | 5 |
| Supply Voltage Rejection | PSR |  | 50 | 60 | dB | VIN = 8 ~ 35 V | 5 |
| DC Open Loop Gain |  |  | 60 | 75 | dB | RL ≥10 MΩ | 5 |
| DC Transconduct. |  |  | 1.1 | 1.5 | ms | 30 KΩ ≤RL≤1 MΩ, TJ = 25°C (Note 1, 3) | 5 |
| Gain Bandwidth Product |  |  | 1 | 2 | MHz | Gv = 0 dB, TJ = 25°C (Note 1) | 5 |
| Input Threshold |  |  | 0.7 | 0.9 | V | Zero Duty-cycle (Note 2) | 5 |
| Input Threshold |  |  | 3.3 | 3.6 | V | Maximum Duty-cycle (Note 2) | 5 |
| Input Bias Current |  |  | 0.05 | 1 | µA | Note 1 | 5 |
| Maximum Duty-cycle |  |  | 45 | 49 | % | Note 2 | 5 |
| Soft Start Low Level |  |  | 0.4 | 0.7 | V | VSD = 2.5 V | 5 |
| Shutdown Threshold |  | 0.6 | 0.8 | 1 | V | To outputs, VSS = 5.1 V, TJ = 25°C | 5 |
| Shutdown Input Current |  |  | 0.4 | 1 | mA | VSD = 2.5 V | 5 |
| Soft Start Current |  | 25 | 50 | 80 | µA | VSD = 0 V, VSS = 0 V | 5 |
| Output Low Level |  |  | 0.2 | 0.4 | V | VC = 20 V; ISINK = 20 mA | 6 |
| Output Low Level |  |  | 1 | 2 | V | VC = 20 V; ISINK = 100 mA | 6 |
| Output High Level |  |  | 18 | 19 | V | VC = 20 V; ISOURCE = 20 mA | 6 |
| Output High Level |  |  | 17 | 18 | V | VC = 20 V; ISOURCE = 100 mA | 6 |
| Under-Voltage Lockout |  | 6 | 7 | 8 | V | VCOMP and VSS = High | 6 |
| Rise Time | tR |  | 100 | 600 | ns | CL = 1 nF, TJ = 25°C (Note 1) | 6 |
| Fall Time | tF |  | 50 | 300 | ns | CL = 1 nF, TJ = 25°C (Note 1) | 6 |
| Supply Current | IS |  | 14 | 20 | mA | VIN = 35 V | 6 |
| Thermal Resistance Junction-Ambient | θJA |  | 100 |  | °C/W | SOP-16 group; junction-alumina, 15×20 mm substrate, infinite heat sink | 4 |

## CAD (KiCad official)

- Symbol: `U3525G-S16-R`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `u3525g-s16-r-etched.step` / `u3525g-s16-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `u3525g-s16-r.step` / `u3525g-s16-r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UTC(Unisonic Tech) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756516821036490752) (10 pp, sha256 `5868f993bb5f68a1`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/u3525g-s16-r-datasheet.pdf)