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Contents

README

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U3315

UNI-SEMI · Gate Drive ICs · TSSOP-20

U3315 from UNI-SEMI, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN1 input Logic input for high side gate driver output HO1, in phase; 3.3 V logic compatible, internal ~200k pull-down, minimum recommended pulse width 300 ns.
2 HIN2 input Logic input for high side gate driver output HO2, in phase; 3.3 V logic compatible, internal ~200k pull-down, minimum recommended pulse width 300 ns.
3 HIN3 input Logic input for high side gate driver output HO3, in phase; 3.3 V logic compatible, internal ~200k pull-down, minimum recommended pulse width 300 ns.
4 LIN1 input Active-low (overbar) logic input for low side gate driver output LO1, out of phase for U3315; 3.3 V logic compatible.
5 LIN2 input Active-low (overbar) logic input for low side gate driver output LO2, out of phase for U3315; 3.3 V logic compatible.
6 LIN3 input Active-low (overbar) logic input for low side gate driver output LO3, out of phase for U3315; 3.3 V logic compatible.
7 VCC power_in Low side and logic fixed supply, recommended 4.5 V to 20 V (absolute max 25 V), with UVLO.
8 COM power_in Logic ground, reference for all voltages.
9 LO3 output Low side gate driver output 3 with 1.2 A source and 1.5 A sink short-circuit pulse current.
10 LO2 output Low side gate driver output 2 with 1.2 A source and 1.5 A sink short-circuit pulse current.
11 LO1 output Low side gate driver output 1 with 1.2 A source and 1.5 A sink short-circuit pulse current.
12 VS3 passive High voltage floating supply return for phase 3; offset operating range -6 V to 260 V.
13 HO3 output High side gate driver output 3 with 1.2 A source and 1.5 A sink short-circuit pulse current.
14 VB3 power_in High side floating supply for phase 3, VS3+4.5 V to VS3+20 V (absolute max 325 V).
15 VS2 passive High voltage floating supply return for phase 2; offset operating range -6 V to 260 V.
16 HO2 output High side gate driver output 2 with 1.2 A source and 1.5 A sink short-circuit pulse current.
17 VB2 power_in High side floating supply for phase 2, VS2+4.5 V to VS2+20 V (absolute max 325 V).
18 VS1 passive High voltage floating supply return for phase 1; offset operating range -6 V to 260 V.
19 HO1 output High side gate driver output 1 with 1.2 A source and 1.5 A sink short-circuit pulse current.
20 VB1 power_in High side floating supply for phase 1, VS1+4.5 V to VS1+20 V (absolute max 325 V).

Key specifications

Parameter Value
Manufacturer UNI-SEMI
Package TSSOP-20
Category Power Management ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Quiescent VCC supply current IQVCC1 210 330 450 μA VHIN1,2,3=VLIN1,2,3=0 or 5V, VENB=0 8
Quiescent VCC supply current in standby mode IQVCC2 46 80 μA VHIN1,2,3=VLIN1,2,3=0 or 5V, VENB=5 8
VCC supply under-voltage positive going threshold VCCUV+ 2.9 4.2 5.5 V 8
VCC supply under-voltage negative going threshold VCCUV- 2.5 3.8 5.1 V 8
High side VBS supply under-voltage positive going threshold VBSUV+ 2.5 3.8 4.5 V 8
High side VBS supply under-voltage negative going threshold VBSUV- 2.2 3.5 4.5 V 8
High side quiescent VBS supply current IQBS 25 45 65 μA VBS=15V 8
Offset supply leakage current ILK 10 μA VB=VS=260V VCC=0V 8
Logic HIGH input voltage VIH 2.5 V 8
Logic LOW input voltage VIL 0.8 V 8
Turn-on propagation delay ton 220 260 ns VHIN1,2,3 or VLIN1,2,3=5V, VS1,2,3=0 9
Turn-off propagation delay toff 110 140 ns VHIN1,2,3 or VLIN1,2,3=0, VS1,2,3=0 9
Dead time matching MDT 50 ns without external dead time 9
Delay matching MT 50 ns external dead time > 1000ns 9
Output pulse-width matching PM 50 ns external dead time > 1000ns, PWIN=10μs, PM=PWOUT-PWIN 9
High side floating supply voltage (abs max) VB -0.3 325 V 6
Low side and logic fixed supply voltage (abs max) VCC -0.3 25 V 6
Allowable offset voltage slew rate dV/dt 50 V/ns 6
Package power dissipation TSSOP20 PD 1.5 W TA ≤ +25 °C 6
Thermal resistance junction to ambient TSSOP20 RthJA 83 °C/W TSSOP20 6
Junction temperature TJ 150 °C 6
Storage temperature TS -55 150 °C 6
Lead temperature TL 300 °C soldering, 10 seconds 6
Low side and logic fixed supply voltage VCC 4.5 20 V 7
High side floating supply offset voltage VS1,2,3 -6 260 V Note1: logic operational for VS of -6V to +260V 7
Logic input voltage (max is COM + 5) VIN 0 5 V COM to COM+5 7
Ambient temperature TA -40 125 °C 7
VCC supply under-voltage lockout hysteresis VCCHYS 0.4 V 8
Operating VCC supply current IVCCOP 1500 μA fLIN1,2,3=20KH, fHIN1,2,3=20KH 8
Input positive going threshold VIN,TH+ 1.9 V 8
Input negative going threshold VIN,TH- 1.4 V 8
High side output HIGH short-circuit pulse current IHO+ 1.2 A VHO=VS=0 8
High side output LOW short-circuit pulse current IHO- 1.5 A VHO=VB=15V 8
Dead time DT 100 ns VHIN1,2,3 or VLIN1,2,3=0 and 5V, without external dead time 9

CAD (KiCad official)

  • Symbol: U3315
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: u3315-etched.step / u3315-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); u3315.step / u3315.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UNI-SEMI datasheet (17 pp, sha256 6b8510d3d62cf0a1, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF