# U3220

**UNI SEMIC** · DC-DC Converters · SOP-7

U3220 from UNI SEMIC, in a SOP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Chip supply pin that also serves as the output voltage feedback input when FB is floating; a 0.1uF SMD capacitor is recommended, VDD_ON is typically 7.5V, VDD_OVP is typically 24V, the internal clamp is 26V at 10mA, and VDD is rated to 30V maximum. |
| 2 | GND | power_in | Chip reference ground. |
| 3 | FB | input | Feedback input pin; leaving it floating selects the default 14.3V output, VFB_REF is 1.84 to 1.90V (typ 1.87V), the OVP threshold is typically 2.40V and the OLP threshold is typically 1.40V. |
| 4 | CS | output | Peak current detection pin used to sense the inductor peak current, with a typical peak current threshold VIPK of 0.3V and an abnormal over-current threshold VAOCP of 0.6V; FB and CS pin voltage is rated -0.3 to 7V. |
| 5 | Drain | power_in | Drain of the internal high-voltage power MOSFET, with a typical breakdown voltage of 120V and a Drain pin voltage rating of -0.3 to 120V. |
| 6 | Drain | power_in | Drain of the internal high-voltage power MOSFET (same node as pin 5), with a typical breakdown voltage of 120V and a Drain pin voltage rating of -0.3 to 120V. |
| 8 | HV | power_in | Internal high-voltage pin for the built-in 180V high-voltage start-up circuit, which charges the VDD capacitor from the high-voltage input during start-up. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UNI SEMIC |
| Package | SOP-7 |
| Category | Power Management (PMIC) |
| Pins | 7 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain 管脚电压 |  | -0.3 |  | 120 | V |  | 6 |
| VDD 供电电压 |  |  |  | 30 | V |  | 6 |
| VDD 箝位电流 |  |  |  | 10 | mA |  | 6 |
| FB ，CS 管脚电压 |  | -0.3 |  | 7 | V |  | 6 |
| 封装热阻---结到环境 |  |  | 165 |  | °C/W |  | 6 |
| 最高芯片工作结温 |  |  |  | 160 | °C |  | 6 |
| 储藏温度 |  | -65 |  | 150 | °C |  | 6 |
| 管脚温度 (焊接 10 秒) |  |  |  | 260 | °C | 焊接 10 秒 | 6 |
| ESD 能力 (人体模型) |  |  |  | 3 | KV | 人体模型 | 6 |
| ESD 能力 (机器模型) |  |  |  | 250 | V | 机器模型 | 6 |
| 工作环境温度 |  | -40 |  | 125 | °C |  | 6 |
| HV 脚供电电流 | IHV | 1 | 4 |  | mA | HV=90V, VDD=0V | 6 |
| VDD 启动电流 | IVDD_st |  | 100 | 300 | uA | 无开关工作 | 6 |
| 内部差分放大器输入端基准 | VFB_REF | 1.84 | 1.87 | 1.9 | V |  | 7 |

## CAD (KiCad official)

- Symbol: `U3220`
- Footprint: `Package_SO:SOIC-8-N7_3.9x4.9mm_P1.27mm`
- 3D model: SOP-7 (KiCad packages3D, STEP)
- 3D model files: `u3220-etched.step` / `u3220-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `u3220.step` / `u3220.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UNI SEMIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755162691310891008) (12 pp, sha256 `ab104bb8c5f2403f`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/u3220-datasheet.pdf)